[Bug target/114288] [14 regression] ICE when building binutils-2.41 on hppa (extract_constrain_insn, at recog.cc:2713)

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114288

--- Comment #14 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by John David Anglin <dang...@gcc.gnu.org>:

https://gcc.gnu.org/g:53fd0f5b1fd737a208c12909fa1188281cb370a3

commit r14-9482-g53fd0f5b1fd737a208c12909fa1188281cb370a3
Author: John David Anglin <dang...@gcc.gnu.org>
Date:   Thu Mar 14 18:32:56 2024 +0000

    hppa: Fix REG+D address support before reload

    When generating PA 1.x code or code for GNU ld, floating-point
    accesses only support 5-bit displacements but integer accesses
    support 14-bit displacements.  I mistakenly assumed reload
    could fix an invalid 14-bit displacement in a floating-point
    access but this is not the case.

    2024-03-14  John David Anglin  <dang...@gcc.gnu.org>

    gcc/ChangeLog:

            PR target/114288
            * config/pa/pa.cc (pa_legitimate_address_p): Don't allow
            14-bit displacements before reload for modes that may use
            a floating-point load or store.