[Bug target/114734] [11/12/13 regression] RISC-V rv64gcv_zvl256b miscompile with -flto -O3 -mrvv-vector-bits=zvl since r8-6047-g65dd1346027bb5

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114734

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |14.0
            Summary|[11/12/13/14 regression]    |[11/12/13 regression]
                   |RISC-V rv64gcv_zvl256b      |RISC-V rv64gcv_zvl256b
                   |miscompile with -flto -O3   |miscompile with -flto -O3
                   |-mrvv-vector-bits=zvl since |-mrvv-vector-bits=zvl since
                   |r8-6047-g65dd1346027bb5     |r8-6047-g65dd1346027bb5

--- Comment #18 from Richard Biener <rguenth at gcc dot gnu.org> ---
We're getting a new RC, so pushed to 14 now as well.