[Bug target/115217] Register pairs can't be encoded in RISC-V inline asm blocks

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115217

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note aarch64's TImode is always allocated in starting in even number registers
(starting in GCC 9:
https://inbox.sourceware.org/gcc-patches/20181002161915.18843-10-richard.hender...@linaro.org/
) .