https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115519
--- Comment #2 from Stefan Schulze Frielinghaus <stefansf at gcc dot gnu.org> --- Just saw on the ML that a match.pd fix already exists https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655484.html A quick test shows that this fixes vcond-shift.c where we now emit ((int) ((unsigned int) xx >> 31) + xx) >> 1 and previously (xx - (xx >> 31)) >> 1 which is basically the same. We just have to adapt the times for scan-assembler w.r.t. signed/unsigned shifts: diff --git a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c index a6b4e97aa50..b942f44039d 100644 --- a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c +++ b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c @@ -3,13 +3,13 @@ /* { dg-do compile { target { s390*-*-* } } } */ /* { dg-options "-O3 -march=z13 -mzarch" } */ -/* { dg-final { scan-assembler-times "vesraf\t%v.?,%v.?,31" 6 } } */ -/* { dg-final { scan-assembler-times "vesrah\t%v.?,%v.?,15" 6 } } */ -/* { dg-final { scan-assembler-times "vesrab\t%v.?,%v.?,7" 6 } } */ +/* { dg-final { scan-assembler-times "vesraf\t%v.?,%v.?,31" 4 } } */ +/* { dg-final { scan-assembler-times "vesrah\t%v.?,%v.?,15" 4 } } */ +/* { dg-final { scan-assembler-times "vesrab\t%v.?,%v.?,7" 4 } } */ /* { dg-final { scan-assembler-not "vzero\t*" } } */ -/* { dg-final { scan-assembler-times "vesrlf\t%v.?,%v.?,31" 4 } } */ -/* { dg-final { scan-assembler-times "vesrlh\t%v.?,%v.?,15" 4 } } */ -/* { dg-final { scan-assembler-times "vesrlb\t%v.?,%v.?,7" 4 } } */ +/* { dg-final { scan-assembler-times "vesrlf\t%v.?,%v.?,31" 6 } } */ +/* { dg-final { scan-assembler-times "vesrlh\t%v.?,%v.?,15" 6 } } */ +/* { dg-final { scan-assembler-times "vesrlb\t%v.?,%v.?,7" 6 } } */ /* Make it expand to two vector operations. */ #define ITER(X) (2 * (16 / sizeof (X[1])))
