https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115962
Bug ID: 115962
Summary: rs6000: Rework precision for 128bit float types and
modes
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Keywords: internal-improvement
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: linkw at gcc dot gnu.org
CC: amacleod at redhat dot com, andy at gwentswordclub dot
co.uk,
bergner at gcc dot gnu.org, jakub at gcc dot gnu.org,
linkw at gcc dot gnu.org, meissner at gcc dot gnu.org,
segher at gcc dot gnu.org, seurer at gcc dot gnu.org,
tschwinge at gcc dot gnu.org
Depends on: 112788, 112993
Target Milestone: ---
Host: powerpc64le-linux-gnu
Target: powerpc64le-linux-gnu
Build: powerpc64le-linux-gnu
+++ This bug was initially created as a clone of Bug #112993 +++
KF/IF/TF are all with 128 mode precision with the fixes for PR112993, this one
is for Jakub's comments in [1]:
"It would be also great if rs6000 backend had just 2 modes for 128-bit
floats, one for IBM double double, one for IEEE quad, not 3 as it has now,
perhaps with TFmode being a macro that conditionally expands to one or the
other. Or do some tweaks in target hooks to keep backwards compatibility
with mode attribute and similar."
[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640342.html
Referenced Bugs:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112788
[Bug 112788] [14 regression] ICEs in fold_range, at range-op.cc:206 after
r14-5972-gea19de921b01a6
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112993
[Bug 112993] rs6000: Rework precision for 128bit float types and modes
