[Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD CPUs with AVX

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688

--- Comment #39 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:9846b0916c1a9b9f3e9df4657670ef4419617134

commit r15-2147-g9846b0916c1a9b9f3e9df4657670ef4419617134
Author: mayshao <mayshao...@zhaoxin.com>
Date:   Thu Jul 18 22:43:00 2024 +0200

    libatomic: Handle AVX+CX16 ZHAOXIN like Intel for 16b atomic [PR104688]

            PR target/104688

    libatomic/ChangeLog:

            * config/x86/init.c (__libat_feat1_init): Don't clear
            bit_AVX on ZHAOXIN CPUs.