[Bug rtl-optimization/115876] [15 regression] ext-dce.cc has ubsan issues; shifting negative values

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115876

--- Comment #17 from Jeffrey A. Law <law at gcc dot gnu.org> ---
And the other case is (subreg:SI (reg:TF) 12).  No great surprise that the bit
position is problematical for that.  Should be an easy fix.