https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729
--- Comment #18 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
Next macro issue is in different sub-algorithm of scheduler.
module schedule is a simplistic algorithm run ahead of list schedular to get
max pressure which is subsequently used for bounding the list scheduler. It
uses the SD_LIST_HARD_BACK and SD_LIST_FORW dependencies to order insns.
However sometimes it can arrive at more pressure than really needed.
model_promote_predecessors() is called when an INSN is ready to be model
scheduled but can't because it has unscheduled predecessor insns. It goes over
all SD_LIST_HARD_BACK deps of INSN and assigns them +1 higher model priority,
enabling them to scheduled ahead of INSN. However currently, this model
priority bumping is done the same for all predecessors, whether REG_DEP_TRUE or
not. For INSN with mutiple deps, the non true deps being bumped can cause
additional delay between scheduling of INSN and true dep, increasing the
pressure.
Same reduced test spill-2.c: -O2 -std=c++03 -march=rv64gc_zba -mabi=lp64d
void a();
double *b, *c, *d, *f, *g, *h;
double e, o, q;
int k, l, n;
int *m;
long p;
void r() {
long ai = p;
for (;;)
for (int j; n; ++j)
for (int i(m[0]); i; i++) {
long aj = i * j;
e = aj;
double am = b[aj], ba = am, bf = ba * o;
c[aj] = aj = f[aj];
double aq = g[aj];
double at = ((double *)a)[aj];
switch (l)
case 2:
(&aj)[ai] = (&d[aj])[ai];
double ax(aq);
double ay(k == 1 ? at : 0);
double az = ay;
double be = ax;
double bg = az * q * be * bf;
double bh = bg;
h[aj] = bh;
}
}
;; Model schedule:
;;
;;|idx insn |mpri hght dpth prio |
;;| 0 56 | 0 8 0 15 | r210=flt(r185#0) GR_REGS:[25,+0]
FP_REGS:[0,+1]
;;| 1 57 | 0 8 1 12 | [r242+low(`e')]=r210 GR_REGS:[25,+0]
FP_REGS:[1,-1]
;;| 2 63 | 2 7 0 12 | r215=r141+r183 GR_REGS:[25,+1]
FP_REGS:[0,+0]
;;| 3 64 | 1 8 2 11 | r216=[r215] GR_REGS:[26,-1]
FP_REGS:[0,+1]
;;| 4 65 | 0 8 3 8 | r143=fix(r216) GR_REGS:[25,+1]
FP_REGS:[1,-1]
;;| 5 67 | 0 8 4 4 | r146=r143<<0x3 GR_REGS:[26,+1]
FP_REGS:[0,+0]
;;| 6 68 | 0 8 5 3 | r217=r144+r146 GR_REGS:[27,+1]
FP_REGS:[0,+0]
;; +--- priority of 70 = 3, priority of 69 60 61 = 4
;;| 7 69 | 4 7 4 5 | r218=flt(r143) GR_REGS:[28,+0]
FP_REGS:[0,+1]
<-- insn 60 further depends on 58, which also gets bumped and schedule
leads to pressure 29 (vs. 70
;;| 8 58 | 6 4 0 5 | r211=r138+r183 GR_REGS:[28,+1]
FP_REGS:[1,+0]
;;| 9 60 | 5 5 2 4 | r213=[r211] GR_REGS:[29,-1]
FP_REGS:[1,+1]
And this happens because when priority of insn 70 predecessors is bumped, all
of them are bumped. If direct dep of 70, insn69 were scheduled, this won't
happen.
That's the gist of the issue.
