[Bug target/117283] [RISC-V] Miscompilation triggered by `__riscv_vsseg7e32_v_i32m1x7`, GCC 14.2.0 at `-O1`, `-O2`, `-O3`, and `-Os`.

[yibohe at pku dot edu.cn via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117283

Yibo He <yibohe at pku dot edu.cn> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |INVALID
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #8 from Yibo He <yibohe at pku dot edu.cn> ---
stride for vlsseg7e32 should be 1*7. Sorry for the noise