https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118241
Bug ID: 118241
Summary: RISC-V ICE: internal compiler error: in
int_mode_for_mode, at stor-layout.cc:407 caused by
prefetch instructions
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: wangpengcheng.pp at bytedance dot com
Target Milestone: ---
This was found when compiling the latest version of linux kernel via using GCC
13.2.1. And this error can be reproduced on GCC 14.2.1 and GCC 15 (master).
The error file is `linux/block/blk-mq.c` and the reduced case is:
```c
void test() { __builtin_prefetch((int *)2047); }
```
When the constant is a number in the range of simm12 [-2048, 2047], the
compiler complains:
```shell
# riscv64-unknown-linux-gnu-gcc -O3 -march=rv64gc_zicbop -mabi=lp64d blk-mq.i
-S -Wno-implicit-int -Wno-int-conversion
during RTL pass: reload
blk-mq.i: In function 'a':
blk-mq.i:4:1: internal compiler error: in int_mode_for_mode, at
stor-layout.cc:407
4 | }
| ^
0x9a9845 int_mode_for_mode(machine_mode)
../../../gcc/gcc/stor-layout.cc:407
0xc3fced emit_move_via_integer
../../../gcc/gcc/expr.cc:4219
0xc514f0 emit_move_insn_1(rtx_def*, rtx_def*)
../../../gcc/gcc/expr.cc:4587
0xc5185d emit_move_insn(rtx_def*, rtx_def*)
../../../gcc/gcc/expr.cc:4729
0xe2c214 lra_emit_move(rtx_def*, rtx_def*)
../../../gcc/gcc/lra.cc:509
0xe4438e curr_insn_transform
../../../gcc/gcc/lra-constraints.cc:4687
0xe45063 lra_constraints(bool)
../../../gcc/gcc/lra-constraints.cc:5442
0xe2e5fa lra(_IO_FILE*, int)
../../../gcc/gcc/lra.cc:2442
0xde947f do_reload
../../../gcc/gcc/ira.cc:5973
0xde947f execute
../../../gcc/gcc/ira.cc:6161
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
```
If we do below changes, we can fix the ICE:
```diff
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 90f638d6ecd..9806ce18117 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3671,7 +3671,7 @@
)
(define_insn "prefetch"
- [(prefetch (match_operand 0 "address_operand" "r")
+ [(prefetch (match_operand 0 "register_operand" "r")
(match_operand 1 "imm5_operand" "i")
(match_operand 2 "const_int_operand" "n"))]
"TARGET_ZICBOP"
@@ -3686,7 +3686,7 @@
[(set_attr "type" "store")])
(define_insn "riscv_prefetchi_<mode>"
- [(unspec_volatile:X [(match_operand:X 0 "address_operand" "r")
+ [(unspec_volatile:X [(match_operand:X 0 "register_operand" "r")
(match_operand:X 1 "imm5_operand" "i")]
UNSPECV_PREI)]
"TARGET_ZICBOP"
```
