[Bug tree-optimization/118405] [15 regression] RISC-V: ICE in verify_gimple during GIMPLE pass vect

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118405

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |15.0
             Target|                            |riscv32
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot 
gnu.org
             Status|UNCONFIRMED                 |ASSIGNED
     Ever confirmed|0                           |1
           Keywords|                            |ice-on-valid-code
   Last reconfirmed|                            |2025-01-13

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
I will try to have a look, but never looked at rv32 - I hope rv64 can use -m32
here.