https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114085
--- Comment #4 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So not really working on this, but figured I could take a quick looksie to see
if it was something simple/easy to fix.
The problem is we have this instruction heading into allocation:
(insn 31 30 33 7 (set (reg/v:QI 23 [ __testvalid ])
(xor:QI (reg/v:QI 23 [ __testvalid ])
(const_int 1 [0x1]))) "j.ii":48:9 discrim 2 360 {xorqi3_1}
Pretty simple, standard stuff.
(reg 23) fails to get a hard register and instead ends up in a stack slot
resulting in:
(insn 31 137 33 7 (set (mem/c:QI (plus:SI (reg/f:SI 11 fp)
(const_int -57 [0xffffffffffffffc7])) [10 %sfp+-61 S1 A8])
(xor:QI (mem/c:QI (plus:SI (reg/f:SI 11 fp)
(const_int -57 [0xffffffffffffffc7])) [10 %sfp+-61 S1 A8])
(const_int 1 [0x1]))) "j.ii":48:9 discrim 2 360 {xorqi3_1}
That addressing mode isn't valid for the single bit manipulation instructions.
In theory the address should have been reloaded into a register. That probably
isn't happening because the "U" constraint isn't marked as a memory_constraint.
It isn't marked that way because "U" accepts register operands as well.
I think we can just remove REG handling from that constraint and replace any
references to "U" that don't also include "r" to include "r". I'll give that a
quick whirl. If it works, great, otherwise I'll likely have to set this aside.
