https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118669
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
Last reconfirmed| |2025-01-27
Keywords| |internal-improvement
Summary|Misaligned store after |Misaligned store after
|after vectorization without |after vectorization without
|using misaligned type |using misaligned type with
| |SVE
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.
(insn 29 28 0 (set (reg/f:DI 115 [ _55 ])
(reg:DI 101 [ ivtmp.19 ])) -1
(nil))
(insn 31 30 0 (set (mem:VNx4SI (reg/f:DI 115 [ _55 ]) [1 MEM <vector([4,4])
int> [(int *)_55]+0 S[16, 16] A128])
(unspec:VNx4SI [
(subreg:VNx4BI (reg:VNx16BI 127) 0)
(reg:VNx4SI 119 [ vect_vec_iv_.6 ])
] UNSPEC_PRED_X)) "/app/example.cpp":6:10 -1
(nil))
Definitely using the wrong alignment.
With -mstrict-align the alignment is correct.
Non SVE code looks correct:
;; MEM <vector(4) int> [(int *)_16] = vect_vec_iv_.8_13;
(insn 30 29 0 (set (mem:V4SI (reg:DI 101 [ ivtmp.15D.4513 ]) [1 MEM <vector(4)
intD.10> [(intD.10 *)_16]+0 S16 A32])
(reg:V4SI 109 [ vect_vec_iv_.8D.4506 ])) "/app/example.cpp":6:10 -1
(nil))
