https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118914
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Component|target |rtl-optimization
Status|UNCONFIRMED |NEW
Last reconfirmed| |2025-02-19
CC| |segher at gcc dot gnu.org
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.
The only difference between __rev16_64_alt and __rev16_64 is the order.
The problem is after the split due to:
```
Trying 8, 9 -> 10:
8: r110:DI=r106:DI 0>>0x8
REG_DEAD r106:DI
9: r111:DI=r110:DI&0xff00ff00ff00ff
REG_DEAD r110:DI
10: r107:DI=r109:DI|r111:DI
REG_DEAD r111:DI
REG_DEAD r109:DI
Failed to match this instruction:
(set (reg:DI 107 [ _6 ])
(ior:DI (and:DI (lshiftrt:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int 71777214294589695 [0xff00ff00ff00ff]))
(reg:DI 109 [ _2 ])))
Splitting with gen_split_44 (aarch64.md:5156)
Successfully matched this instruction:
(set (reg:DI 113)
(and:DI (reg/v:DI 106 [ x ])
(const_int -71777214294589696 [0xff00ff00ff00ff00])))
Successfully matched this instruction:
(set (reg:DI 107 [ _6 ])
(ior:DI (lshiftrt:DI (reg:DI 113)
(const_int 8 [0x8]))
(reg:DI 109 [ _2 ])))
allowing combination of insns 8, 9 and 10
original costs 4 + 4 + 4 = 12
replacement costs 4 + 4 = 8
deferring deletion of insn with uid = 8.
modifying insn i2 9: r113:DI=r106:DI&0xff00ff00ff00ff00
REG_DEAD r106:DI
deferring rescan insn with uid = 9.
modifying insn i3 10: r107:DI=r113:DI 0>>0x8|r109:DI
REG_DEAD r109:DI
deferring rescan insn with uid = 10.
```
combine didn't add the REG_DEAD of r113 to new i3.
And then when combine does the combine further down the line:
```
Trying 6, 7, 9 -> 10:
6: r108:DI=r106:DI<<0x8
7: r109:DI=r108:DI&0xff00ff00ff00ff00
REG_DEAD r108:DI
9: r113:DI=r106:DI&0xff00ff00ff00ff00
REG_DEAD r106:DI
10: r107:DI=r113:DI 0>>0x8|r109:DI
REG_DEAD r109:DI
Failed to match this instruction:
(parallel [
(set (reg:DI 107 [ _6 ])
(ior:DI (and:DI (lshiftrt:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int 71777214294589695 [0xff00ff00ff00ff]))
(and:DI (ashift:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int -71777214294589696 [0xff00ff00ff00ff00]))))
(set (reg:DI 113)
(and:DI (reg/v:DI 106 [ x ])
(const_int -71777214294589696 [0xff00ff00ff00ff00])))
])
Failed to match this instruction:
(parallel [
(set (reg:DI 107 [ _6 ])
(ior:DI (and:DI (lshiftrt:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int 71777214294589695 [0xff00ff00ff00ff]))
(and:DI (ashift:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int -71777214294589696 [0xff00ff00ff00ff00]))))
(set (reg:DI 113)
(and:DI (reg/v:DI 106 [ x ])
(const_int -71777214294589696 [0xff00ff00ff00ff00])))
])
Successfully matched this instruction:
(set (reg:DI 113)
(and:DI (reg/v:DI 106 [ x ])
(const_int -71777214294589696 [0xff00ff00ff00ff00])))
Successfully matched this instruction:
(set (reg:DI 107 [ _6 ])
(ior:DI (and:DI (lshiftrt:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int 71777214294589695 [0xff00ff00ff00ff]))
(and:DI (ashift:DI (reg/v:DI 106 [ x ])
(const_int 8 [0x8]))
(const_int -71777214294589696 [0xff00ff00ff00ff00]))))
allowing combination of insns 6, 7, 9 and 10
original costs 4 + 4 + 4 + 4 = 16
replacement costs 4 + 4 = 8
i2 didn't change, not doing this
```
It fails because i2 didn't change but combine didn't realize the setting of 113
was not needed.
