[Bug target/118931] [15 Regression] RISC-V: rv64gcv miscompile at -O[23] since r15-3228-g771256bcb9d

[pan2.li at intel dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118931

Li Pan <pan2.li at intel dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |pan2.li at intel dot com

--- Comment #1 from Li Pan <pan2.li at intel dot com> ---
Reproduced from upstream with "-mrvv-vector-bits=zvl", will take a look.