[Bug target/119238] error: structured bindings only available with ‘-std=c++17’ or ‘-std=gnu++17’ [-Werror=c++17-extensions]

[jakub at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119238

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Started with r15-7623-gcef5f23adb6f9f052d03286ad8ccf352eefccf86
GCC is now written in C++14, so this is inappropriate.

If the reason for structured binding was to improve formatting, it didn't help
much, the major problem are the excessive long names due to many iterators.
Perhaps
--- gcc/config/loongarch/simd.md.jj     2025-03-05 06:39:50.198297885 +0100
+++ gcc/config/loongarch/simd.md        2025-03-12 10:42:05.769933119 +0100
@@ -809,18 +809,21 @@ (define_expand "<su>dot_prod<wvec_half><
    (any_extend (const_int 0))]
   ""
 {
-  auto [op0, op1, op2, op3] = operands;
-
-  if (op3 == CONST0_RTX (<WVEC_HALF>mode))
-    emit_insn (
-      gen_<simd_isa>_<x>vmulwev_<simdfmt_w>_<simdfmt><u> (op0, op1, op2));
+  rtx (*gen4) (rtx, rtx, rtx, rtx);
+  if (operands[3] == CONST0_RTX (<WVEC_HALF>mode))
+    {
+      rtx (*gen3) (rtx, rtx, rtx)
+       = gen_<simd_isa>_<x>vmulwev_<simdfmt_w>_<simdfmt><u>;
+      emit_insn (gen3 (operands[0], operands[1], operands[2]));
+    }
   else
-    emit_insn (
-      gen_<simd_isa>_<x>vmaddwev_<simdfmt_w>_<simdfmt><u> (op0, op3, op1,
-                                                          op2));
+    {
+      gen4 = gen_<simd_isa>_<x>vmaddwev_<simdfmt_w>_<simdfmt><u>;
+      emit_insn (gen4 (operands[0], operands[1], operands[2], operands[3]));
+    }

-  emit_insn (
-    gen_<simd_isa>_<x>vmaddwod_<simdfmt_w>_<simdfmt><u> (op0, op0, op1, op2));
+  gen4 = gen_<simd_isa>_<x>vmaddwod_<simdfmt_w>_<simdfmt><u>;
+  emit_insn (gen4 (operands[0], operands[1], operands[2], operands[3]));
   DONE;
 })