https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119348
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |missed-optimization, ra
Ever confirmed|0 |1
Last reconfirmed| |2025-03-18
Target Milestone|--- |15.0
Status|UNCONFIRMED |NEW
Summary|risc-v vector tuple casting |[15 Regression] risc-v
|optimization regression |vector tuple casting
| |optimization regression
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Disabling late combine1 get the GCC 15 back for -Os.
But this looks like a subreg register allocation issue:
trying to combine definition of r151 in:
2: {r151:RVVM1x8SF=r153:RVVM1x8SF;clobber scratch;clobber scratch;clobber
scratch;}
REG_DEAD r153:RVVM1x8SF
into:
16: r143:RVVM8SF#0=r151:RVVM1x8SF#0
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 143 [ resultD.129176 ]) 0)
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) 0))
18: r144:RVVM8SF#[16,16]=r151:RVVM1x8SF#[16,16]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 144 [ resultD.129176 ]) [16, 16])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [16, 16]))
20: r145:RVVM8SF#[32,32]=r151:RVVM1x8SF#[32,32]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 145 [ resultD.129176 ]) [32, 32])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [32, 32]))
22: r146:RVVM8SF#[48,48]=r151:RVVM1x8SF#[48,48]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 146 [ resultD.129176 ]) [48, 48])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [48, 48]))
24: r147:RVVM8SF#[64,64]=r151:RVVM1x8SF#[64,64]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 147 [ resultD.129176 ]) [64, 64])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [64, 64]))
26: r148:RVVM8SF#[80,80]=r151:RVVM1x8SF#[80,80]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 148 [ resultD.129176 ]) [80, 80])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [80, 80]))
28: r149:RVVM8SF#[96,96]=r151:RVVM1x8SF#[96,96]
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 149 [ resultD.129176 ]) [96, 96])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [96, 96]))
30: r150:RVVM8SF#[112,112]=r151:RVVM1x8SF#[112,112]
REG_DEAD r151:RVVM1x8SF
successfully matched this instruction to *movrvvm1sf_whole:
(set (subreg:RVVM1SF (reg/v:RVVM8SF 150 [ <retval> ]) [112, 112])
(subreg:RVVM1SF (reg:RVVM1x8SF 153 [ tupleD.129165 ]) [112, 112]))
original cost = 4 + 4 + 4 + 4 + 4 + 4 + 4 + 4 + 4, replacement cost = 4 + 4 + 4
+ 4 + 4 + 4 + 4 + 4; keeping replacement
rescanning insn with uid = 16.
rescanning insn with uid = 18.
rescanning insn with uid = 20.
rescanning insn with uid = 22.
rescanning insn with uid = 24.
rescanning insn with uid = 26.
rescanning insn with uid = 28.
rescanning insn with uid = 30.
updating insn 30 in-place
verify found no changes in insn with uid = 30.
updating insn 28 in-place
verify found no changes in insn with uid = 28.
updating insn 26 in-place
verify found no changes in insn with uid = 26.
updating insn 24 in-place
verify found no changes in insn with uid = 24.
updating insn 22 in-place
verify found no changes in insn with uid = 22.
updating insn 20 in-place
verify found no changes in insn with uid = 20.
updating insn 18 in-place
verify found no changes in insn with uid = 18.
updating insn 16 in-place
verify found no changes in insn with uid = 16.
deleting insn 2
deleting insn with uid = 2.
