https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119533
--- Comment #4 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
Debug log:
`
Phase 4: Insert, modify and remove vsetvl insns.
### loop for missed vsetvl
Insert missed vsetvl info at edge(bb 31 -> bb 32): VALID (insn 663, bb 31)
Insert vsetvl insn 753:
Insert missed vsetvl info at edge(bb 31 -> bb 43): VALID (insn 663, bb 31)
Insert vsetvl insn 754:
edge(bb 42 -> bb 64):VALID (insn 663, bb 64) <-- gcc_assert() EDGE_ABNORMAL
`
So insn 663 is central to this issue. It is initially propagated into multiple
BBs and then LCM prunes it out from most of them.
`
Phase 1:
Try fuse basic block 29
Ignore curr info since prev info available with it:
prev_info: VALID (insn 663, bb 29)
curr_info: VALID (insn 664, bb 29)
VSETVL infos after phase 1
bb 29:
probability: 2.2% (guessed)
Header vsetvl info:VALID (insn 663, bb 29)
Footer vsetvl info:VALID (insn 663, bb 29)
insn 663 vsetvl info:VALID (insn 663, bb 29)
Phase 2: Lift up vsetvl info.
Try lift up 0.
Set empty bb 28 to info:VALID (insn 663, bb 29)
Try lift up 1.
Set empty bb 27 to info:VALID (insn 663, bb 28)
Try lift up 2.
Set empty bb 43 to info:VALID (insn 663, bb 27)
Try lift up 3.
Fused global info result (lift 3):
Set empty bb 31 to info:VALID (insn 663, bb 43)
Set empty bb 42 to info:VALID (insn 663, bb 43)
Phase 3: Reduce global vsetvl infos.
### 663 was present in 6 BBs
Compute LCM insert and delete data:
Expression List (14):
Expr[4]: VALID (insn 663, bb 27)
Expr[5]: VALID (insn 663, bb 28)
Expr[6]: VALID (insn 663, bb 29)
Expr[7]: VALID (insn 663, bb 31)
Expr[8]: VALID (insn 663, bb 42)
Expr[9]: VALID (insn 663, bb 43)
bitmap data:
BB 27:
avloc: n_bits = 14, set = {4 5 6 7 8 9 }
kill: n_bits = 14, set = {0 1 2 3 10 11 12 13 }
antloc: n_bits = 14, set = {4 }
transp: n_bits = 14, set = {}
avin: n_bits = 14, set = {}
avout: n_bits = 14, set = {4 5 6 7 8 9 }
del: n_bits = 14, set = {4 }
BB 28:
avloc: n_bits = 14, set = {4 5 6 7 8 9 }
kill: n_bits = 14, set = {0 1 2 3 10 11 12 13 }
antloc: n_bits = 14, set = {5 }
transp: n_bits = 14, set = {}
avin: n_bits = 14, set = {4 5 6 7 8 9 }
avout: n_bits = 14, set = {4 5 6 7 8 9 }
del: n_bits = 14, set = {5 }
BB 29:
avloc: n_bits = 14, set = {4 5 6 7 8 9 }
kill: n_bits = 14, set = {0 1 2 3 10 11 12 13 }
antloc: n_bits = 14, set = {6 }
transp: n_bits = 14, set = {}
avin: n_bits = 14, set = {4 5 6 7 8 9 }
avout: n_bits = 14, set = {4 5 6 7 8 9 }
del: n_bits = 14, set = {6 } <--- ### deleted
BB 43:
avloc: n_bits = 14, set = {4 5 6 7 8 9 }
kill: n_bits = 14, set = {0 1 2 3 10 11 12 13 }
antloc: n_bits = 14, set = {9 }
transp: n_bits = 14, set = {}
avin: n_bits = 14, set = {4 5 6 7 8 9 }
avout: n_bits = 14, set = {4 5 6 7 8 9 }
del: n_bits = 14, set = {9 }
...
LCM deleting vsetvl of block 27
LCM deleting vsetvl of block 28
LCM deleting vsetvl of block 29
LCM deleting vsetvl of block 43
VSETVL infos after phase 3
### 663 deleted from 4 of the 6 blocks
bb 27:
probability: 2.2% (guessed)
Header vsetvl info:VALID (insn 663, bb 27) (deleted)
Footer vsetvl info:VALID (insn 663, bb 27) (deleted)
bb 28:
probability: 2.2% (guessed)
Header vsetvl info:VALID (insn 663, bb 28) (deleted)
Footer vsetvl info:VALID (insn 663, bb 28) (deleted)
bb 29:
probability: 2.2% (guessed)
Header vsetvl info:VALID (insn 663, bb 29) (deleted)
Footer vsetvl info:VALID (insn 663, bb 29) (deleted)
insn 663 vsetvl info:VALID (insn 663, bb 29) (deleted)
bb 31:
probability: 1.9% (guessed)
Header vsetvl info:VALID (insn 663, bb 31)
Footer vsetvl info:VALID (insn 663, bb 31)
bb 42:
probability: 1.9% (guessed)
Header vsetvl info:VALID (insn 663, bb 42)
Footer vsetvl info:VALID (insn 663, bb 42)
bb 43:
probability: 1.9% (guessed)
Header vsetvl info:VALID (insn 663, bb 43) (deleted)
Footer vsetvl info:VALID (insn 663, bb 43) (deleted)
`
Comparing the asm-output of --param=vsetvl-strategy=simple (which works), the
BB layout is generally sane and it seems we can simply skip the abnormal edge.
FWWI I did try to tinker with LCM a bit, skipping abnormal edges in
invalid_opt_bb_p () which creates the sets for LCM, but it didn't matter.
