https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119644
Bug ID: 119644
Summary: __builtin_arm_set_fpscr ICE with -mgeneral-regs-only
on Arm targets
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: gcc-bugzilla at geoff dot wozniak.ca
Target Milestone: ---
The following function built with current mainline code (commit
5b9fd65726afef37ed6a6e39f0ceb7f47160ba07), using the configuration given below
causes an ICE with an unrecognized insn.
% ~/src/gnu/gcc/configure --prefix ~/tmp/opt --target arm-none-eabi
--enable-languages=c
% cat t.c
unsigned int wrap (void)
{
return __builtin_arm_get_fpscr ();
}
% arm-none-eabi-gcc -march=armv7-a -mfloat-abi=hard -mfpu=neon-vfpv4
-mgeneral-regs-only -S t.c
t.c: In function ‘wrap’:
t.c:4:1: error: unrecognizable insn:
4 | }
| ^
(insn 5 2 6 2 (set (reg:SI 116)
(unspec_volatile:SI [
(const_int 0 [0])
] VUNSPEC_GET_FPSCR)) "t.c":3:12 -1
(nil))
during RTL pass: vregs
t.c:4:1: internal compiler error: in extract_insn, at recog.cc:2882
0x203fa3f internal_error(char const*, ...)
/home/woz/src/gnu/gcc/gcc/diagnostic-global-context.cc:517
0x94a965 fancy_abort(char const*, int, char const*)
/home/woz/src/gnu/gcc/gcc/diagnostic.cc:1749
0x7e51cb _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
/home/woz/src/gnu/gcc/gcc/rtl-error.cc:108
0x7e51e7 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
/home/woz/src/gnu/gcc/gcc/rtl-error.cc:116
0x7e3bc9 extract_insn(rtx_insn*)
/home/woz/src/gnu/gcc/gcc/recog.cc:2882
0xca8610 instantiate_virtual_regs_in_insn
/home/woz/src/gnu/gcc/gcc/function.cc:1612
0xca8610 instantiate_virtual_regs
/home/woz/src/gnu/gcc/gcc/function.cc:1995
0xca8610 execute
/home/woz/src/gnu/gcc/gcc/function.cc:2042
Please submit a full bug report, with preprocessed source.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
Preprocessed source stored into /tmp/cc3qlQkr.out file, please attach this to
your bugreport.
Trying this on Compiler Explorer it goes back to version 9.2.1, which around
when the -mgeneral-regs-only option was introduced for Arm targets. It fails
on every version since then.
https://godbolt.org/z/a9qP48zdx
The ICE happens when using a target with -mfloat-abi=hard and providing an FPU.
I haven't tried all the combinations, mind you, but it happens on all the ones
I've tried. It happens with __builtin_arm_set_fpscr as well.
Whether getting/setting the FPSCR with -mgeneral-regs-only is an error, I don't
know. A case could be made either way since the MRC/MCR instructions don't
touch the FP registers.
