https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119733
Bug ID: 119733
Summary: store-merging increases alignment
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: kristerw at gcc dot gnu.org
Target Milestone: ---
store-merging miscompiles the following program when targeting x86_64 with the
options "-O3 -fno-strict-aliasing":
struct S { unsigned char a, b; unsigned short c; unsigned char d, e, f, g;
unsigned long long h; };
__attribute__((noipa)) void
f3 (struct S *p, struct S *q)
{
unsigned char pa = q->a;
unsigned char pb = q->b;
unsigned short pc = q->c;
unsigned char pd = q->d;
unsigned char pe = q->e;
unsigned char pf = q->f;
unsigned char pg = q->g;
p->a = pa;
p->b = pb;
p->c = pc;
p->d = pd;
p->e = pe;
p->f = pf;
p->g = pg;
}
The GIMPLE before store-merging performs the memory operations as:
vect_pa_3.5_19 = MEM <vector(2) unsigned char> [(unsigned char *)q_2(D)];
pc_5 = q_2(D)->c;
vect_pd_6.10_24 = MEM <vector(4) unsigned char> [(unsigned char *)q_2(D) +
4B];
MEM <vector(2) unsigned char> [(unsigned char *)p_10(D)] = vect_pa_3.5_19;
p_10(D)->c = pc_5;
MEM <vector(4) unsigned char> [(unsigned char *)p_10(D) + 4B] =
vect_pd_6.10_24;
which requires 32-bit alignment. The store-merging pass then changes this to
_26 = MEM <unsigned long> [(void *)q_2(D)];
MEM <unsigned long> [(void *)p_10(D)] = _26;
requiring 64-bit alignment.
