https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119760
Bug ID: 119760
Summary: GCC does not implement intrinsics for Vector
Multiply-by-10 Unsigned Quadword and varients
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: minor
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: munroesj at gcc dot gnu.org
Target Milestone: ---
POWER8 (PowerISA 2.07) introduced Binary Coded Decimal (BCD) Add/Subtract.
GCC implemented builtins (__builtin_bcdadd/sub) operating on the vector
__int128 type for these instructions. This included predicated for comparison,
6.62.26.3 PowerPC AltiVec Built-in Functions Available on ISA 2.07
POWER9 (PowerISA 3.0) more BCD instructions (shift/trucate/Convert/Zoned).
All operated on VSRs (128-bit). Happy COBOL and RPG!
POWER9 also implemented Vector Multiply-by-10 Unsigned Quadword [with
carry/extend].
Also operating on VSRs.
As far as I can tell none of the POWER9 BCD operations where implemented in
GCC.
