[Bug target/120263] New: RISC-V: FRM not restored if clobbered via inline asm

[vineetg at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120263

            Bug ID: 120263
           Summary: RISC-V: FRM not restored if clobbered via inline asm
           Product: gcc
           Version: 15.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: vineetg at gcc dot gnu.org
          Reporter: vineetg at gcc dot gnu.org
                CC: jeffreyalaw at gmail dot com, pan2.li at intel dot com,
                    rdapp at gcc dot gnu.org
  Target Milestone: ---

This is a variation of 

gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-insert-9.c

# -O3 -march=rv64gcv -mabi=lp64 

#pragma riscv intrinsic "vector"

typedef long unsigned int size_t;

void
test_float_point_frm_static (float *out, vfloat32m1_t op1, vfloat32m1_t op2,
        size_t vl)
{
  vfloat32m1_t result = __riscv_vfadd_vv_f32m1 (op1, op2, vl);

  asm volatile (
    "fsrmi 4"
    :
    :
    :"frm"
  );

  result = __riscv_vfadd_vv_f32m1 (op1, result, vl);
  *(vfloat32m1_t *)out = result;
}

The second vfadd needs to execute with the "global" rounding mode and thus
needs to be saved/restored around the inline asm.

        vsetvli zero,a1,e32,m1,ta,ma
        vfadd.vv        v9,v8,v9
        frrm    a5                     <-- missing
        fsrmi 4
        fsrm    a5                     <-- missing
        vfadd.vv        v8,v8,v9
        vs1r.v  v8,0(a0)
        ret