https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120479
--- Comment #1 from Jeffrey A. Law <law at gcc dot gnu.org> ---
Paolo, good to hear from you :-)
I don't think that's directly possible.
; c from line (1) in a7; r+1 in t1
seqz t1,t1
and t3,a7,t1 ; t3 = (t1 == 0) ? 0 : a7
sltu a5,a2,a5 ; r<a1 in a5
or a5,a5,t3
That and actually computes
t3 = (t1 == 0) ? 0 : a7 & 0x1;
We can see this in the RTL too:
Trying 60 -> 62:
60: r190:SI=r191:SI==0
REG_DEAD r191:SI
62: r192:SI=r146:SI&r190:SI
REG_DEAD r190:SI
REG_DEAD r146:SI
Failed to match this instruction:
(set (reg:SI 192)
(and:SI (eq:SI (reg:SI 191)
(const_int 0 [0]))
(reg:SI 146 [ _12 ])))
Am I missing something here?
