[Bug target/118241] RISC-V ICE: internal compiler error: in int_mode_for_mode, at stor-layout.cc:407 caused by prefetch instructions

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118241

--- Comment #8 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So I think the way to go for the data prefetching issue is:

1. Define a proper predicate for valid prefetch operands.
   a. REG
   b. REG+D where D is a simm12 with D & 0xf == 0
   c. Immediate wehre immediate is simm12 with D & 0xf == 0

2. Define a suitable constraint which matches the same.

3. Adjust the two patterns to use the new predicate & constraint.

4. Testcase which verifies those cases all work as expected.