https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121198
--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Stefan Schulze Frielinghaus <[email protected]>: https://gcc.gnu.org/g:7fc6024998c37114556912c15d3eae024d310667 commit r16-4732-g7fc6024998c37114556912c15d3eae024d310667 Author: Stefan Schulze Frielinghaus <[email protected]> Date: Thu Oct 30 13:50:46 2025 +0100 lra: Fix computing reg class for hard register constraints [PR121198] Currently the register class derived from a hard register constraint is solely determined from a single register. This even works for register pairs if all the required registers are contained in this very register class and falls apart if not. For example: long test (void) { long x; __asm__ ("..." : "={r22}" (x)); return x; } For AVR -mmcu=atmega8, variable `x` requires a register quadruple and the minimal class for single register r22 is SIMPLE_LD_REGS which itself entails registers r16 up to r23. However, variable `x` is bound to registers r22 up to r25. Thus, the minimal class containing those is LD_REGS. Therefore, compute the least upper bound of all register classes over all required registers. PR rtl-optimization/121198 gcc/ChangeLog: * lra-constraints.cc (process_alt_operands): Compute least upper bound of all register classes over all required registers in order to determine register class for a hard register constraint. gcc/testsuite/ChangeLog: * gcc.target/avr/pr121198.c: New test.
