[Bug target/123521] [14/15/16 Regression] LoongArch64: ICE at -O1/O2/O3 during RTL pass: expand

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123521

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P4
             Target|                            |loongarch64
   Target Milestone|---                         |14.4
           Keywords|                            |ice-on-valid-code