https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124933
--- Comment #16 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-15 branch has been updated by Richard Earnshaw <[email protected]>: https://gcc.gnu.org/g:ac18e030293f2215a9ef162cc43c1ce81ed2e81b commit r15-11115-gac18e030293f2215a9ef162cc43c1ce81ed2e81b Author: Richard Earnshaw <[email protected]> Date: Mon Apr 20 16:57:22 2026 +0100 arm: fix mov<mode>_vfp_<mode>16 for fp16-only devs [PR124933] We should only be using VLD1/VST1 instructions when we have an auto-inc address of some suitable form and only when we have NEON_FP16INST. At other times we should just use VLDR/VSTR. This ensures that the code will assemble on targets that lack Advanced SIMD. Also correct the constraint so that we can use offset addressing on platforms that also have Neon. gcc/ChangeLog: PR target/124933 * config/arm/constraints.md (Uj): Allow offset addressing for all targets, only allow Neon addressing when we have both Neon and FP16INST. * config/arm/vfp.md (mov<mode>_vfp_<mode>16): Only use vld1/vst1 when the pattern needs address write-back. gcc/testsuite/ChangeLog: PR target/124933 * lib/target-supports.exp (v8_1m_main_fp_hard): New arm architecture variant. * gcc.target/arm/pr124933.c: New test. * gcc.target/arm/armv8_2-fp16-move-1.c: Update expected output. (cherry picked from commit d3057c943a06276b4ced70401e98186c592969ad)
