https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125065
--- Comment #3 from Tamar Christina <tnfchris at gcc dot gnu.org> --- (In reply to Richard Biener from comment #2) > This seems to be due to correctness fixes around early break: > > t.c:10:27: missed: single-element interleaving not supported for not > adjacent vector loads, using elementwise access > t.c:10:27: note: using gather/scatter for strided/grouped access, scale = 4 > t.c:10:27: note: early break not supported: cannot peel for alignment. > With non-contiguous memory vectorization could read out of bounds at _6 = > *_5; > t.c:14:16: missed: not vectorized: relevant stmt not supported: _6 = *_5; > t.c:10:27: note: unsupported SLP instance starting from: sum_17 = _6 + > sum_15; > t.c:10:27: missed: unsupported SLP instances The trapping behavior on the % would also disallow this. That said, AArch64 defines certain instructions like division as non trapping on 0. So for AArch64 the alignment issues aside.. We should be able to vectorize this. Any appetite for allowing a hook that asks of the target *really* traps on an instruction? Essentially can we have the target interpret UB or implementation defined behavior?
