https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50481
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Assignee|unassigned at gcc dot gnu.org |jakub at gcc dot gnu.org
Status|NEW |ASSIGNED
--- Comment #25 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
As for aarch64, the following works for me, but haven't tested it yet beyond
gcc.dg/builtin-bitreverse-1.c test:
2026-05-16 Jakub Jelinek <[email protected]>
PR target/50481
* config/aarch64/aarch64.md (bitreverse<mode>2): New define_expand.
--- gcc/config/aarch64/aarch64.md.jj 2026-04-20 09:07:40.439840638 +0200
+++ gcc/config/aarch64/aarch64.md 2026-05-16 21:32:02.545388156 +0200
@@ -5786,6 +5786,24 @@ (define_insn "@aarch64_rbit<mode>"
[(set_attr "type" "rbit")]
)
+(define_expand "bitreverse<mode>2"
+ [(set (match_operand:GPI 0 "register_operand")
+ (bitreverse:GPI (match_operand:GPI 1 "register_operand")))])
+
+(define_expand "bitreverse<mode>2"
+ [(match_operand:SHORT 0 "register_operand")
+ (match_operand:SHORT 1 "register_operand")]
+ ""
+ {
+ rtx rbitd = gen_reg_rtx (SImode);
+ emit_insn (gen_bitreversesi2 (rbitd, gen_lowpart (SImode, operands[1])));
+ rtx shiftd = gen_reg_rtx (SImode);
+ emit_insn (gen_ashrsi3 (shiftd, rbitd, GEN_INT (32 - <sizen>)));
+ emit_move_insn (operands[0], gen_lowpart (<MODE>mode, shiftd));
+ DONE;
+ }
+)
+
(define_expand "ffs<mode>2"
[(match_operand:GPI 0 "register_operand")
(match_operand:GPI 1 "register_operand")]
Guess bitreverseti2 could be handled too, dunno if in the backend or in generic
code handle doubleword bitreverse using 2 word bitreverses and swapping the
words.
Given that we have widen_bswap and expand_doubleword_bswap I think we should
just copy/adjust those in the generic code and even remove from the above
aarch64 patch the second define_expand.
Will handle it on Monday.
