https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125880
Hongtao Liu <liuhongt at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |liuhongt at gcc dot gnu.org
--- Comment #6 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
> For the cases above the code comes from the vec_init expander but I can
> imagine this might be too early for a perfect decision.
it comes from ix86_expand_vector_init_interleave which use SImode for
V*HI/V*QImode for vec_init_0.
18396 else
18397 {
18398 /* Extend the odd element to SImode using a paradoxical SUBREG.
*/
18399 op0 = gen_reg_rtx (SImode);
18400 emit_move_insn (op0, gen_lowpart (SImode, op));
18401
18402 /* Insert the SImode value as low element of V4SImode vector.
*/
18403 op1 = gen_reg_rtx (V4SImode);
18404 op0 = gen_rtx_VEC_MERGE (V4SImode,
18405 gen_rtx_VEC_DUPLICATE (V4SImode,
18406 op0),
18407 CONST0_RTX (V4SImode),
18408 const1_rtx);
18409 emit_insn (gen_rtx_SET (op1, op0));
18410
18411 /* Cast the V4SImode vector back to a vector in original mode.
*/
18412 op0 = gen_reg_rtx (mode);
18413 emit_move_insn (op0, gen_lowpart (mode, op1));
18414
18415 /* Load even elements into the second position. */
18416 emit_insn (gen_load_even (op0,
18417 force_reg (inner_mode,
18418 ops[i + i + 1]),
18419 const1_rtx));
18420 }
