https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126054
Bug ID: 126054
Summary: [15/16/17 Regression] Insns
*extzv_<mode>_{srl,sll}<clobbercc_or_nocc> do not
honor vacated bits
Product: gcc
Version: 15.1.0
Status: UNCONFIRMED
Keywords: wrong-code
Severity: normal
Priority: P3
Component: target
Assignee: stefansf at gcc dot gnu.org
Reporter: stefansf at gcc dot gnu.org
Target Milestone: ---
Host: s390*-*-*
int a = 255, b;
long c = 1, d;
long *e = &d;
int main() {
long f;
unsigned char g;
__int128 h = -10;
f = (long)h * (unsigned)(c | 56);
for (; b;)
;
g = (unsigned char) f;
*e = 2540LL ^ g;
a = 16777215 ^ a ^ d & 255;
if ((a ^ (int) 4294967295) != 0xFF0000D5)
__builtin_abort ();
}
The bitmask for risbg is not updated and includes vacated bits, i.e., currently
we emit
risbgn %r2,%r3,56,128+63,1
but we expect
risbgn %r2,%r3,56,128+62,1
Currently running bootstrap+regtest for a potential fix.
