https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125339
--- Comment #5 from Alex Coplan <acoplan at gcc dot gnu.org> --- (In reply to Leon Albrecht from comment #0) > On virtualized systems HW emulation is done through page faults, and on > ARM64 the hypervisor depends on the Exception Syndrome Register to contain > the wanted physical address. > On ARM the pre-/post-increment memory instruction do not affect this > register properly, forcing to hypervisors to either throw an error or > attempt software emulation, which most do not do. I understand that the Linux kernel uses inline asm to ensure a regular (non-writeback) load is used for MMIO accesses. > > For MMIO accesses C and C++ suggest using the `volatile` specifier, which > should > force compilers to emit correctly sized ordered accesses, and imo also emit > code that works in all HW situations (as in virtualized environments) I don't think the C standard says anything that constrains implementations to avoid auto-increment addressing on volatile accesses. So I think this isn't a GCC bug. > Is this intentional and should this be addressed in any way > and is there any easy workaround for the projects relying on volatile for > MMIO accesses > I think using inline asm here seems like a reasonable workaround, as Linux does.
