https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126276
Roger Sayle <roger at nextmovesoftware dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
CC| |roger at nextmovesoftware dot
com
Status|UNCONFIRMED |NEW
Last reconfirmed| |2026-07-15
--- Comment #1 from Roger Sayle <roger at nextmovesoftware dot com> ---
This issue is documented in cris.md...
;; Pattern matching the BTST insn.
;; SImode. This mode is the only one needed, since gcc automatically
;; extends subregs for lower-size modes.
(define_insn "*btst<mode>"
...
So only SImode is currently supported for the *btstcc_znn pattern.
Alas the splitter at line 2366.md currently looks like:
;; Test a single bit at operand[0] against 0/non-0.
(define_insn_and_split "*cbranch<mode>4_btstrq1_<CC>"
[(set (pc)
(if_then_else
(zcond
(zero_extract:BWD
...
where BWD on cris includes QImode, HImode and SImode.
Summary the define_insn_and_split accepts QImode but *btst doesn't.
Time to read the CRIS architecture documentation on byte bit tests...
I'll leave this as RTL optimization until I'm convinced this transformation
is a win on CRIS-like targets (at which point this becomes a target bug).
