https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126465
Bug ID: 126465
Summary: [16/17 Regression] Wrong code with IFN_COND_FMA
folding on SVE
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Keywords: aarch64-sve, wrong-code
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
On aarch64 with SVE the testcase:
float a[256], b[256], c[256], d[256], r[256];
__attribute__((noipa)) void
f (int n)
{
for (int i = 0; i < n; i++)
{
float t = d[i] > 0.f ? __builtin_fmaf (a[i], b[i], c[i]) : d[i];
r[i] = -t;
}
}
__attribute__((noipa)) void
g (int n)
{
for (int i = 0; i < n; i++)
{
float t = d[i] > 0.f ? __builtin_fmaf (-a[i], b[i], c[i]) : d[i];
r[i] = -t;
}
}
int
main (void)
{
for (int i = 0; i < 256; i++)
{
a[i] = 1.f; b[i] = 2.f; c[i] = 3.f; d[i] = -1.f; r[i] = 0.f;
}
f (256);
for (int i = 0; i < 256; i++)
if (r[i] != 1.f)
__builtin_abort ();
for (int i = 0; i < 256; i++)
r[i] = 0.f;
g (256);
for (int i = 0; i < 256; i++)
if (r[i] != 1.f)
__builtin_abort ();
return 0;
}
aborts with -O3 -march=armv8-a+sve but passes without +sve and also passes
anyway with GCC 15.
I suspect this is a generic bug though.
