https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127004
Georg-Johann Lay <gjl at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |gjl at gcc dot gnu.org
--- Comment #3 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
Thanks for reporting.
The bug is when a replaced insn has more scratch regs than one QImode. Scratch
regs have to be ignored when the effect of the new sequence is simulated
against the effect of the old one, since the new sequence may clobber less
registers.
In the specific test case, the insn is a transparent libgcc call
(define_insn_and_split "*mulsi3_call_pr118012_split"
[(set (reg:SI 22)
(mult:SI (reg:SI 22)
(reg:SI 18)))
(clobber (reg:SI 18))
(clobber (reg:HI 26))
(clobber (reg:HI 30))]
"avropt_pr118012
&& ! AVR_HAVE_MUL
&& ! AVR_TINY"
which has been introduced in order to hack around PR118012.
The very optimization pass has been added in r15-5415 for PR84211.
For the time being, the ICE can be worked around with -mno-fuse-move.
