https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127237
--- Comment #3 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
One difference in the IRA dumps above is:
With Reload (v0 dump):
Popping a3(r50,l0) -- assign reg 18
Popping a2(r48,l0) -- assign reg 18
Popping a0(r47,l0) -- assign reg 18
Popping a1(r49,l0) -- assign reg 22
Assigning 22 to a0r47
so IRA improved the a0 in ira-color.cc::improve_allocation() whereas with LRA
it doesn't (v1 dump). a0 is R22, but a2 and a1 are completely ignoring that
andsi3 is a 2-operand insn:
Popping a2(r48,l0) -- assign reg 24
Popping a3(r50,l0) -- assign reg 18
Popping a0(r47,l0) -- assign reg 22
Popping a1(r49,l0) -- assign reg 28
