[Bug target/127269] [17 Regression] [RISC-V] ICE in riscv_v_widen_constraint_ok during IRA pass with -march=rv64gcv

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127269

Robin Dapp <rdapp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2026-09-09
             Status|UNCONFIRMED                 |NEW
                 CC|                            |pan2.li at intel dot com,
                   |                            |rdapp at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #1 from Robin Dapp <rdapp at gcc dot gnu.org> ---
Confirmed.  Pan, could you have a look?