https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127692
Bug ID: 127692
Summary: [16/17 Regression] s390x ICE during split1 of bswaphi2
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: jakub at gcc dot gnu.org
Target Milestone: ---
void
foo (double x, char *y, int z)
{
_Float16 a = (_Float16) x;
if (!z)
{
unsigned short b;
__builtin_memcpy (&b, &a, 2);
b = __builtin_bswap16(b);
__builtin_memcpy (y, &b, 2);
}
else
__builtin_memcpy (y, &a, sizeof (_Float16));
}
ICEs on s390x-linux with e.g. -O2 -march=z13 (gcc 15 and earlier rejected this
because _Float16 wasn't supported, so most likely the ICE has been introduced
with r16-6682.
Anyway, we have:
(insn 53 52 54 2 (set (reg:HI 66)
(bswap:HI (subreg:HI (reg:HF 70 [ _1 ]) 0))) "rh2544649.c":9:11 2667
{bswaphi2}
(nil))
before split1 pass, which attempts to use
(define_split
[(set (match_operand:HI 0 "register_operand" "")
(bswap:HI (match_operand:HI 1 "register_operand" "")))]
""
[(set (match_dup 2) (bswap:SI (match_dup 3)))
(set (match_dup 2) (lshiftrt:SI (match_dup 2) (const_int 16)))]
{
operands[2] = simplify_gen_subreg (SImode, operands[0], HImode, 0);
operands[3] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
})
splitter for this. Now, I don't know if this splitting is a mere optimization
or required, in any case, trying to simplify a subreg of a subreg isn't going
to work properly, so I'd say that at least the latter should force_reg
operands[1] into a REG, dunno if unconditionally, or at least if
simplify_gen_subreg returns NULL_RTX (and then retry), at least when it is
still possible to create pseudos.
Dunno how to deal with it afterwards, but hopefully there shouldn't be such
subregs after RA.
