[Bug target/127813] New: Missed opportunity for czero on RISC-V

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127813

            Bug ID: 127813
           Summary: Missed opportunity for czero on RISC-V
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
  Target Milestone: ---

typedef unsigned int uint32_t;
uint32_t ct_select(uint32_t bit, uint32_t a, uint32_t b) {
    uint32_t mask = -(bit & 1);
    return (a & mask) | (b & ~mask);
}


Should compile into a fairly simple czero seqeuence like this (clang):

        andi    a0, a0, 1
        czero.eqz       a1, a1, a0
        czero.nez       a0, a2, a0
        or      a0, a0, a1

Instead we get:

        andi    a5,a0,1
        addiw   a0,a5,-1
        negw    t0,a5
        and     t1,a0,a2
        and     a1,a1,t0
        or      a0,t1,a1

https://godbolt.org/z/nv1z8j15j