https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127996
Bug ID: 127996
Summary: Redundant zero_extend on ctz patterns on aarch64
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Keywords: easyhack, missed-optimization
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
Target: aarch64
Consider:
typedef unsigned long long u64;
u64
ctz_wide (unsigned int x)
{
return __builtin_ctz (x);
}
u64
ctz_zero (unsigned int x)
{
return __builtin_ctzg (x, 32);
}
u64
ctz_live_input (unsigned int x)
{
unsigned int n = __builtin_ctzg (x, 32);
return ((u64) x << 32) | n;
}
On aarch64 -O2 this generates:
ctz_wide:
rbit w0, w0
clz w0, w0
and x0, x0, 63
ret
ctz_zero:
rbit w0, w0
clz w0, w0
and x0, x0, 63
ret
ctz_live_input:
rbit w1, w0
clz w1, w1
uxtw x1, w1
add x0, x1, x0, lsl 32
ret
but Clang manages:
ctz_wide:
rbit w8, w0
clz w0, w8
ret
ctz_zero:
rbit w8, w0
clz w0, w8
ret
ctz_live_input:
rbit w8, w0
clz w8, w8
orr x0, x8, x0, lsl #32
ret
It should be a matter of adding the right ctz+zero_extend pattern in
aarch64.md. There may be some nuance in handling the cssc vc rbit+clz splitting
