https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128046
Bug ID: 128046
Summary: [17 Regression] arm: bfi no longer used for bit-field
insertion
Product: gcc
Version: 17.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: yuki.tanaka at defaultcase dot de
Target Milestone: ---
Since GCC 17, inserting a bit-field on Thumb-2 (Cortex-M3) is no longer
compiled to bfi. GCC 16.1 uses a single bfi, trunk uses lsls/and/bic/add
instead.
unsigned f1 (unsigned x, unsigned v)
{
return (x & ~(0x3fu << 5)) | ((v & 0x3f) << 5);
}
void f2 (volatile unsigned *p, unsigned v)
{
*p = (*p & ~(0xfu << 8)) | ((v & 0xf) << 8);
}
Options: -O2 -mcpu=cortex-m3 -mthumb
Checked on Godbolt.
arm-none-eabi-gcc trunk: https://godbolt.org/z/rG3sd9e3h
f1:
lsls r1, r1, #5
and r1, r1, #2016
bic r0, r0, #2016
add r0, r0, r1
bx lr
f2:
ldr r3, [r0]
lsls r1, r1, #8
and r1, r1, #3840
bic r3, r3, #3840
add r1, r1, r3
str r1, [r0]
bx lr
arm-none-eabi-gcc 16.1: https://godbolt.org/z/cx1cY71jo
f1:
bfi r0, r1, #5, #6
bx lr
f2:
ldr r3, [r0]
bfi r3, r1, #8, #4
str r3, [r0]
bx lr
Possibly related to r17-4953-g53c3316a8c79 ("PR tree-optimization/108477: Use
ranger to select PLUS vs IOR in expand") and r17-5043-g415316f432cd ("AArch64:
Change the bitfield patterns to be any-or-plus (AOP) safe").
