https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100867

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Stefan Schulze Frielinghaus
<[email protected]>:

https://gcc.gnu.org/g:8c0a15694343ace40a2965c47783589cb5057491

commit r17-5815-g8c0a15694343ace40a2965c47783589cb5057491
Author: Stefan Schulze Frielinghaus <[email protected]>
Date:   Mon Nov 2 13:54:52 2026 +0100

    s390: For halfwords a byte-swap is a rotate by 8 bits [PR100867]

    Instead of a vperm, which needs a permutation vector loaded from the
    constant pool, rotate each halfword by 8 bits, which is equivalent.

    This also applies to constant permutations dealt with via
    TARGET_VECTORIZE_VEC_PERM_CONST where we previously bailed out early
    without VXE2.  However, the halfword case is folded to a rotate which
    does not require VXE2, therefore, don't bail out early.

    The implementation is more invasive than expected.  A new named insn
    bswapv8hi_vxe2 is needed that must not carry a permutation vector,
    unlike the existing *bswap<mode> split pattern. If the existing insn
    were reused, during RA the reg-reg alternative would still push the
    constant into the constant pool.  This would make r13 the pool pointer,
    which may result in spills, and a vector register is allocated to load
    the constant into although it is unused and removed in the end.  To
    circumvent this, *vec_splats_bswap_vec<mode>,
    *vec_insert_and_zero_bswap<mode>, and *vec_set_bswap_vec<mode> are
    duplicated for V8HI, the only difference being that the permutation
    vector is left out.

    For V4SI we could basically do the same by emitting two rotates instead
    of a load+vperm.  However, a priori it is not clear whether this is
    really worthwhile.  In the best case the load of the constant is hoisted
    out of the hot path which means only a cheap vperm remains.  Only in
    case the load cannot be hoisted and the cache line for the load is
    evicted, two rotates are beneficial.

            PR target/100867

    gcc/ChangeLog:

            * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
            Handle the halfword byte-swap permutation also without VXE2.
            * config/s390/vector.md (VT_HW_SDT): New mode iterator.
            (V_HW_SD): Ditto.
            (bswap<mode>): Deal with V8HI directly.
            (bswapv8hi_vxe2): New insn.
            (*bswap<mode>): Remove V8HI mode handling which is done in
            bswap<mode>, now.
            (*vec_splats_bswap_vecv8hi): New insn for V8HI and VXE2 which
            doesn't make use of a permutation vector.
            (*vstbr<mode>): Use mode iterator VI_HW_SDT instead of
            VI_HW_HSDT.
            * config/s390/vx-builtins.md (*vec_insert_and_zero_bswapv8hi):
            New insn for V8HI and VXE2 which doesn't make use of a
            permutation vector.
            (*vec_set_bswap_vecv8hi): Ditto.

    gcc/testsuite/ChangeLog:

            * gcc.target/s390/vector/vec-perm-halfword-swap-1.c: New test.
            * gcc.target/s390/zvector/vec-revb-halfword-1.c: New test.

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