https://gcc.gnu.org/g:d4c0800aab864bb95260e12342d18695c6ebbec8
commit r13-8483-gd4c0800aab864bb95260e12342d18695c6ebbec8
Author: Richard Biener <rguent...@suse.de>
Date: Mon Jan 29 09:47:31 2024 +0100
middle-end/113622 - allow .VEC_SET and .VEC_EXTRACT for global hard regs
The following expands .VEC_SET and .VEC_EXTRACT instruction selection
to global hard registers, not only automatic variables (possibly)
promoted to registers. This can avoid some ICEs later and create
better code.
PR middle-end/113622
* gimple-isel.cc (gimple_expand_vec_set_extract_expr):
Also allow DECL_HARD_REGISTER variables.
* gcc.target/i386/pr113622-1.c: New testcase.
(cherry picked from commit 96bc048d78f804bac0fa7b2ca3b6dd3a04c68217)
Diff:
---
gcc/gimple-isel.cc | 3 ++-
gcc/testsuite/gcc.target/i386/pr113622-1.c | 12 ++++++++++++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/gcc/gimple-isel.cc b/gcc/gimple-isel.cc
index ef688ddb57f..760029d27c9 100644
--- a/gcc/gimple-isel.cc
+++ b/gcc/gimple-isel.cc
@@ -77,7 +77,8 @@ gimple_expand_vec_set_expr (struct function *fun,
gimple_stmt_iterator *gsi)
tree pos = TREE_OPERAND (lhs, 1);
tree view_op0 = TREE_OPERAND (op0, 0);
machine_mode outermode = TYPE_MODE (TREE_TYPE (view_op0));
- if (auto_var_in_fn_p (view_op0, fun->decl)
+ if ((auto_var_in_fn_p (view_op0, fun->decl)
+ || (VAR_P (view_op0) && DECL_HARD_REGISTER (view_op0)))
&& !TREE_ADDRESSABLE (view_op0) && can_vec_set_var_idx_p (outermode))
{
location_t loc = gimple_location (stmt);
diff --git a/gcc/testsuite/gcc.target/i386/pr113622-1.c
b/gcc/testsuite/gcc.target/i386/pr113622-1.c
new file mode 100644
index 00000000000..d3a51cd81dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr113622-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f -w" } */
+
+typedef float __attribute__ ((vector_size (64))) vec;
+register vec a asm("zmm5"), b asm("zmm6"), c asm("zmm7");
+
+void
+test (void)
+{
+ for (int i = 0; i < 8; i++)
+ c[i] = a[i] < b[i] ? 0.1 : 0.2;
+}
