[gcc r14-9711] RISC-V: testsuite: ensure vtype is call clobbered

[Vineet Gupta via Gcc-cvs]

https://gcc.gnu.org/g:c1424628dc95829408882f01cbf0dd61566dc312

commit r14-9711-gc1424628dc95829408882f01cbf0dd61566dc312
Author: Vineet Gupta <vine...@rivosinc.com>
Date:   Wed Mar 27 14:55:04 2024 -0700

    RISC-V: testsuite: ensure vtype is call clobbered
    
    Per classic Vector calling convention ABI, vtype is call clobbered,
    so ensure gcc regenerates a VSETVLI in following cases:
     - after a function call.
     - after an inline asm fragment which clobbers vtype.
    
    ATM gcc seems to be doing the right thing, but a test can never hurt.
    
    gcc/testsuite/ChangeLog:
            * gcc.target/riscv/rvv/vtype-call-clobbered.c: New Test.
    
    Signed-off-by: Vineet Gupta <vine...@rivosinc.com>

Diff:
---
 .../gcc.target/riscv/rvv/vtype-call-clobbered.c    | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c 
b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c
new file mode 100644
index 00000000000..be9f312aa50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vtype-call-clobbered.c
@@ -0,0 +1,47 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64 -O2" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
+
+#include "riscv_vector.h"
+
+extern void can_clobber_vtype();
+
+static inline void v_loop (void * restrict in, void * restrict out, int n)
+{
+  for (int i = 0; i < n; i++)
+    {
+      vuint8mf8_t v = *(vuint8mf8_t*)(in + i);
+      *(vuint8mf8_t*)(out + i) = v;
+    }
+}
+
+/* Two V instructions back-back.
+   Only 1 vsetvli insn.  */
+void
+vec1 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     v_loop(in, out2, n);
+}
+
+/* Two V instructions seperated by a function call.
+   Both need to have a corresponding vsetvli insn.  */
+void
+vec2 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     can_clobber_vtype();
+     v_loop(in, out2, n);
+}
+
+/* Two V instructions seperated by an inline asm with vtype clobber.
+   Both need to have a corresponding vsetvli insn.  */
+void
+vec3 (void * restrict in, void * restrict out1,  void * restrict out2, int n)
+{
+     v_loop(in, out1, n);
+     asm volatile("":::"vtype");
+     v_loop(in, out2, n);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli} 5 } } */