https://gcc.gnu.org/g:26d48b6d3e2d07583f25f0769d0c005864760aee
commit r11-11412-g26d48b6d3e2d07583f25f0769d0c005864760aee Author: Peter Bergner <berg...@linux.ibm.com> Date: Tue Apr 9 15:24:39 2024 -0500 rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865] This is a cleanup patch in preparation to fixing the real bug in PR101865. TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that. Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR and delete the now dead mask. 2024-04-09 Peter Bergner <berg...@linux.ibm.com> gcc/ PR target/101865 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. * config/rs6000/rs6000.c (rs6000_option_override_internal): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. (rs6000_opt_masks): Neuter the "direct-move" option. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless comment. * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete OPTION_MASK_DIRECT_MOVE. (OTHER_P8_VECTOR_MASKS): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var. (cherry picked from commit 7924e352523b37155ed9d76dc426701de9d11a22) Diff: --- gcc/config/rs6000/rs6000-c.c | 14 +------------- gcc/config/rs6000/rs6000-cpus.def | 3 --- gcc/config/rs6000/rs6000.c | 14 +++----------- gcc/config/rs6000/rs6000.h | 2 ++ gcc/config/rs6000/rs6000.opt | 2 +- 5 files changed, 7 insertions(+), 28 deletions(-) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index afcb5bb6e39..1e3117899bb 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -432,19 +432,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6"); if ((flags & OPTION_MASK_POPCNTD) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7"); - /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically - turned on in the following condition: - 1. TARGET_P8_VECTOR is enabled and OPTION_MASK_DIRECT_MOVE is not - explicitly disabled. - Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to - have been turned on explicitly. - Note that the OPTION_MASK_DIRECT_MOVE flag is automatically - turned off in any of the following conditions: - 1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly - disabled and OPTION_MASK_DIRECT_MOVE was not explicitly - enabled. - 2. TARGET_VSX is off. */ - if ((flags & OPTION_MASK_DIRECT_MOVE) != 0) + if ((flags & OPTION_MASK_P8_VECTOR) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8"); if ((flags & OPTION_MASK_MODULO) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9"); diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 907e1469736..518897df935 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -49,7 +49,6 @@ #define ISA_2_7_MASKS_SERVER (ISA_2_6_MASKS_SERVER \ | OPTION_MASK_P8_VECTOR \ | OPTION_MASK_CRYPTO \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC) @@ -94,7 +93,6 @@ /* Flags that need to be turned off if -mno-power8-vector. */ #define OTHER_P8_VECTOR_MASKS (OTHER_P9_VECTOR_MASKS \ | OPTION_MASK_P9_VECTOR \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_CRYPTO) /* Flags that need to be turned off if -mno-vsx. */ @@ -125,7 +123,6 @@ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \ - | OPTION_MASK_DIRECT_MOVE \ | OPTION_MASK_DLMZB \ | OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_FLOAT128_HW \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3e5281c0f05..4864c959a6e 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3824,7 +3824,7 @@ rs6000_option_override_internal (bool global_init_p) Testing for direct_move matches power8 and later. */ if (!BYTES_BIG_ENDIAN && !(processor_target_table[tune_index].target_enable - & OPTION_MASK_DIRECT_MOVE)) + & OPTION_MASK_P8_VECTOR)) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; if (!rs6000_fold_gimple) @@ -3870,8 +3870,7 @@ rs6000_option_override_internal (bool global_init_p) && (rs6000_isa_flags_explicit & (OPTION_MASK_SOFT_FLOAT | OPTION_MASK_ALTIVEC | OPTION_MASK_VSX)) != 0) - rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO - | OPTION_MASK_DIRECT_MOVE) + rs6000_isa_flags &= ~((OPTION_MASK_P8_VECTOR | OPTION_MASK_CRYPTO) & ~rs6000_isa_flags_explicit); if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) @@ -3956,13 +3955,6 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FPRND; } - if (TARGET_DIRECT_MOVE && !TARGET_VSX) - { - if (rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE) - error ("%qs requires %qs", "-mdirect-move", "-mvsx"); - rs6000_isa_flags &= ~OPTION_MASK_DIRECT_MOVE; - } - if (TARGET_P8_VECTOR && !TARGET_ALTIVEC) { if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR) @@ -23773,7 +23765,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = false, true }, { "cmpb", OPTION_MASK_CMPB, false, true }, { "crypto", OPTION_MASK_CRYPTO, false, true }, - { "direct-move", OPTION_MASK_DIRECT_MOVE, false, true }, + { "direct-move", 0, false, true }, { "dlmzb", OPTION_MASK_DLMZB, false, true }, { "efficient-unaligned-vsx", OPTION_MASK_EFFICIENT_UNALIGNED_VSX, false, true }, diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 5a6f9bf4aa2..229aed4655d 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -471,6 +471,8 @@ extern int rs6000_vector_align[]; #define TARGET_EXTSWSLI (TARGET_MODULO && TARGET_POWERPC64) #define TARGET_MADDLD TARGET_MODULO +/* TARGET_DIRECT_MOVE is redundant to TARGET_P8_VECTOR, so alias it to that. */ +#define TARGET_DIRECT_MOVE TARGET_P8_VECTOR #define TARGET_XSCVDPSPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR) #define TARGET_XSCVSPDPN (TARGET_DIRECT_MOVE || TARGET_P8_VECTOR) #define TARGET_VADDUQM (TARGET_P8_VECTOR && TARGET_POWERPC64) diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 6b0a3e27529..f3150527407 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -499,7 +499,7 @@ Target Mask(CRYPTO) Var(rs6000_isa_flags) Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions. mdirect-move -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved +Target Undocumented WarnRemoved mhtm Target Mask(HTM) Var(rs6000_isa_flags)