https://gcc.gnu.org/g:800d2947fa8297ea9871c59d520fc5e429d4263b
commit 800d2947fa8297ea9871c59d520fc5e429d4263b
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Fri Jun 21 03:27:20 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.tar | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/gcc/ChangeLog.tar b/gcc/ChangeLog.tar
index 21a1d759e9f4..c5b3554401df 100644
--- a/gcc/ChangeLog.tar
+++ b/gcc/ChangeLog.tar
@@ -1,3 +1,32 @@
+==================== Branch work169-tar, patch #204 ====================
+
+Add -mlrspr.
+
+2024-06-21 Michael Meissner <meiss...@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add
+ support for -mlrspr.
+ * config/rs6000/rs6000.opt (-mlrspr): New debug option.
+
+==================== Branch work169-tar, patch #203 ====================
+
+Fix up TAR errors
+
+2024-06-21 Michael Meissner <meiss...@linux.ibm.com>
+
+ * config/rs6000/rs6000.md (movcc_<mode>): Add alternatives to allowing
+ Cmode and floating point (under debug switches) back. Add support for
+ the TAR register.
+ (movsf_hardfloat): Likewise.
+ (movsd_hardfloat): Likewise.
+ (mov<mode>_softfloat): Likewise.
+ (mov<mode>_hardfloat64): Likewise.
+ (mov<mode>_softfloat64): Likewise.
+ * lra-constraints.cc (lra_constraints): Change internal_error to
+ fatal_insn.
+
==================== Branch work169-tar, patch #202 ====================
Add options for modes in SPR registers.
