[gcc r15-1850] MIPS/testsuite: Add -mfpxx to call-clobbered-1.c

[YunQiang Su via Gcc-cvs]

https://gcc.gnu.org/g:e08ed5f1c98ea8de086f5c2d1e373aec6e195735

commit r15-1850-ge08ed5f1c98ea8de086f5c2d1e373aec6e195735
Author: YunQiang Su <s...@gcc.gnu.org>
Date:   Fri Jun 28 10:08:38 2024 +0800

    MIPS/testsuite: Add -mfpxx to call-clobbered-1.c
    
    The scan-assembler-times rules only fit for -mfp32 and -mfpxx.
    It fails if we are configured as FP64 by default, as it has
    one less sdc1/ldc1 pair.
    
    gcc/testsuite
            * gcc.target/mips/call-clobbered-1.c: Add -mfpxx.

Diff:
---
 gcc/testsuite/gcc.target/mips/call-clobbered-1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/mips/call-clobbered-1.c 
b/gcc/testsuite/gcc.target/mips/call-clobbered-1.c
index 77294aa3c2d..8880ad13684 100644
--- a/gcc/testsuite/gcc.target/mips/call-clobbered-1.c
+++ b/gcc/testsuite/gcc.target/mips/call-clobbered-1.c
@@ -1,6 +1,6 @@
 /* Check that we handle call-clobbered FPRs correctly.  */
 /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
-/* { dg-options "isa>=2 -mabi=32 -mhard-float -ffixed-f0 -ffixed-f1 -ffixed-f2 
-ffixed-f3 -ffixed-f4 -ffixed-f5 -ffixed-f6 -ffixed-f7 -ffixed-f8 -ffixed-f9 
-ffixed-f10 -ffixed-f11 -ffixed-f12 -ffixed-f13 -ffixed-f14 -ffixed-f15 
-ffixed-f16 -ffixed-f17 -ffixed-f18 -ffixed-f19" } */
+/* { dg-options "isa>=2 -mabi=32 -mfpxx -mhard-float -ffixed-f0 -ffixed-f1 
-ffixed-f2 -ffixed-f3 -ffixed-f4 -ffixed-f5 -ffixed-f6 -ffixed-f7 -ffixed-f8 
-ffixed-f9 -ffixed-f10 -ffixed-f11 -ffixed-f12 -ffixed-f13 -ffixed-f14 
-ffixed-f15 -ffixed-f16 -ffixed-f17 -ffixed-f18 -ffixed-f19" } */
 
 void bar (void);
 double a;