The branch 'aoliva/heads/testme' was updated to point to: 1445b105ff49... [lra] force reg update after spilling to memory
It previously pointed to: 64388b09fdcf... [testsuite] [x86] vect-simd-clone-1[678]e.c adjust Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): ------------------------------------------------------------------- 64388b0... [testsuite] [x86] vect-simd-clone-1[678]e.c adjust 45009ea... [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to m 4a4bd7e... [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in fo cbd499d... [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-p c7a859a... [testsuite] add missing require vect_early_break_hw for vec bd3a169... [testsuite] [x86] forwprop-41 needs -msse 2773709... [testsuite] [x86] strlenopt-80 needs -msse2 on ia32 4283405... [testsuite] [x86] memcpy-6 needs -msse2 eb3366e... [testsuite] [x86] double copysign requires -msse2 5d1d9e9... [testsuite] [ppc] add -mpowerpc-gfxopt or -mcmpb to copysig 72d5ed7... [testsuite] require sysconf for vect-early-break_109-pr1135 9c0562e... [testsuite] [aarch64] match alt cache clear names in sme no 0f13cbd... [testsuite] [arm] use uint64_t in rwsr tests 91567f8... [testsuite] tolerate missing std::stold d89ccaf... [testsuite] [arm] require fpic for pr115485 ee3453d... [testsuite] [arm] add -mno-long-calls c9fceb8... [testsuite] [vxworks] tolerate missing __atomic_feraiseexce Summary of changes (added commits): ----------------------------------- 1445b10... [lra] force reg update after spilling to memory 10360c1... [vxworks] build partial libatomic (*) a4f45de... iesFrom: Alexandre Oliva <ol...@adacore.com> (*) 65f27c1... [RISC-V] Clear both upper and lower bits using 3 shifts (*) c770859... [PATCH][RISC-V][PR target/70557] Improve storing 0 to memor (*) bb7b6d9... aarch64: Improve rtx_cost for constants in COMPARE [PR12037 (*) 21a4870... expand: Use rtx_cost directly instead of gen_move_insn for (*) 0faa31d... libstdc++: Define _Scoped_allocation RAII helper (*) c0a2526... libstdc++: Fix PSTL test iterators (*) 04f2be7... libstdc++: Fix vector(from_range_t, R&&) for exceptions [PR (*) 63cd56d... bitintlower: Ensure extension of the most significant limb (*) 9c621ef... doc: Document the 'q' constraint for LoongArch (*) f716eb6... testsuite: aarch64: arm: Fix -mcpu=unset support in shared (*) 5f4e794... i386: Extend *cmp<mode>_minus_1 optimizations also to plus (*) d8636b0... [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-sll (*) b3c778e... [RISC-V] Clear high or low bits using shift pairs (*) 035ab47... Daily bump. (*) 84c6988... aarch64: Carry over zeroness in aarch64_evpc_reencode (*) dff727b... [PATCH] configure: Always add pre-installed header director (*) f725d67... combine: gen_lowpart_no_emit vs CLOBBER [PR120090] (*) 0bed343... [RISC-V] Improve (x << C1) + C2 split code (*) 8459c54... [RISC-V][PR target/120368] Fix 32bit shift on rv64 (*) 4f02bfb... RISC-V: Add test for vec_duplicate + vand.vv combine case 1 (*) b7b9146... RISC-V: Add test for vec_duplicate + vand.vv combine case 0 (*) ad04194... RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx (*) e82a9f6... [testsuite] [x86] vect-simd-clone-1[678]e.c adjust (*) 6621311... [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to m (*) 3392849... [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in fo (*) 012a857... [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-p (*) 57cc4f8... [testsuite] add missing require vect_early_break_hw for vec (*) 8bb72b7... [testsuite] [x86] forwprop-41 needs -msse (*) fe9be60... [testsuite] [x86] strlenopt-80 needs -msse2 on ia32 (*) f3a758e... [testsuite] [x86] memcpy-6 needs -msse2 (*) 02788cd... [testsuite] [x86] double copysign requires -msse2 (*) 4b75dec... [testsuite] [aarch64] match alt cache clear names in sme no (*) d41028d... [testsuite] [aarch64] use uint64_t in rwsr tests (*) 2075340... [testsuite] tolerate missing std::stold (*) f3c5e0a... [testsuite] [analyzer] [vxworks] define __STDC_WANT_LIB_EXT (*) 659fe2a... [testsuite] [vxworks] netinet includes atomic, reqs c++11 (*) 99a65bf... vxworks: libgcc: include string.h for memset (*) d63c889... genemit: Use a byte encoding to generate insns (*) aca0cf1... genemit: Avoid using gen_exp in output_add_clobbers (*) 97d2686... genemit: Remove support for string operands (*) efbc8de... genemit: Remove purported handling of location_ts (*) 8ebe8f5... genemit: Always track multiple uses of operands (*) 88b849f... genemit: Add a generator struct (*) 02c3910... genemit: Consistently use operand arrays in gen_* functions (*) 5355568... genemit: Factor out code common to insns and expands (*) 4fafb14... genemit: Add an internal queue (*) 9b57e38... genemit: Use references rather than pointers (*) 35dd609... sparc: Avoid operandN variables in .md files (*) 856f6de... xstormy16: Avoid accessing beyond the operands[] array (*) a6ec398... nds32: Avoid accessing beyond the operands[] array (*) 18df4a1... c++, coroutines: Clean up the ramp cleanups. (*) e71a6e0... c++, coroutines: Use decltype(auto) for the g_r_o. (*) e06555a... c++, coroutines: Address CWG2563 return value init [PR11991 (*) 36c20fe... libstdc++: use maintained size when split pb_ds binary sear (*) 2e27df6... libstdc++: maintain subtree size in pb_ds binary search tre (*) 6740732... libstdc++: remove two redundant statements in pb_ds binary (*) 95c74f3... middle-end: Fix complex lowering of cabs with no LHS [PR120 (*) 5568277... [RISC-V] Infrastructure of synthesizing logical AND with co (*) 72f0b44... Add pattern match in match.pd for .AVG_CEIL (*) fc12a4d... Daily bump. (*) 70a5de6... match: Remove valueize_condition argument from gimple_extra (*) fba34a0... cobol: Multiple PRs; formatting; exception processing. (*) 18f272e... [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and (*) 1186a2b... [PATCH v2 1/2] The following changes enable P8700 processor (*) d44beb1... cobol: sqrt(0) is not an ec-argument error. [PR119885] (*) 67584ac... libstdc++: Cleanup and stabilize format _Spec<_CharT> and _ (*) 501e6e7... libstdc++: Fix incorrect links to archived SGI STL docs (*) 35fd4ab... libgcc: Move bitint support exports to x86/aarch64 specific (*) e38027c... tree-chrec: Use signed_type_for in convert_affine_scev (*) 092dcef... libgcc: Small bitint_reduce_prec big-endian fixes (*) 1c32b55... bitintlower: Big-endian lowering support (*) 870e66a... c++/modules: Ensure vtables are emitted when needed [PR1203 (*) 9de7d37... [RISC-V] Avoid multiple assignments to output object (*) b0de729... c++/modules: Fix ICE on merge of instantiation with partial (*) 9a6e5a4... c++/modules: Always mark tinfo vars as TREE_ADDRESSABLE [PR (*) 1e579e2... Extend vect_recog_cond_expr_convert_pattern to handle REAL_ (*) dd8ee1d... RISC-V: Tweak the asm check test of vx combine on GR2VR cos (*) d1697f3... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) a05beea... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) 82de5c5... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) 7e12fee... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) e604b48... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) 7c5c12b... RISC-V: Add test for vec_duplicate + vrsub.vv combine case (*) 4a8ce14... RISC-V: Combine vec_duplicate + vrsub.vv to vrsub.vx on GR2 (*) dc3f70a... Daily bump. (*) 38fa6c0... [committed][RISC-V][PR target/120333] Remove bogus bext pat (*) 23a8659... hpux: Fix detection of atomic support when profiling (*) 9063810... 'TYPE_EMPTY_P' vs. code offloading [PR120308] (*) 45efda0... Add 'libgomp.c-c++-common/target-abi-struct-1-O0.c', 'libgo (*) 7ef9cb4... Fix libgomp.oacc-fortran/lib-13.f90 async bug (*) cbc258c... [RISC-V] Fix false positive from Wuninitialized (*) bf98b73... Fortran: fix FAIL of gfortran.dg/specifics_1.f90 after r16- (*) e5bb7a3... arm: fully validate mem_noofs_operand [PR120351] (*) 1197f89... libstdc++: Fix some Clang -Wsystem-headers warnings in <ran (*) 1ed7585... libstdc++: Fix std::format of chrono::local_days with {} [P (*) 7fabbf3... RISC-V: Fix the warning of temporary object dangling refere (*) 1193604... RISC-V: Rename conflicting variables in gen-riscv-ext-texi. (*) a3e78dd... RISC-V: Support Zilsd code gen (*) 2ec5082... regcprop: Return from copy_value for unordered modes (*) c9eb473... RISC-V: Add new operand constraint: cR (*) 3fc902e... i386: Combine AVX10.2 compile time test (*) 34caeae... i386: Refactor AVX10.2 runtime test (*) 5817101... i386: Combine AVX10.2 intrin files (*) 5bdb722... i386: Remove duplicate iterators in md (*) c052a6f... i386: Remove avx10.1-256/512 and evex512 options (*) 25523c6... i386: Unpush OPTION_MASK_ISA2_EVEX512 for builtins (*) 76270d0... Daily bump. (*) eb2ea47... emit-rtl: Allow extra checks for paradoxical subregs [PR119 (*) 809b46d... Partially lift restriction from loc_list_from_tree_1 (*) 98129ff... phiopt: Use mark_lhs_in_seq_for_dce instead of doing it inl (*) f32946c... Regenerate cobol/lang.opt.urls (*) fd50d2a... Daily bump. (*) de04f59... [PATCH] libgcc SH: fix alignment for relaxation (*) 7ed37d5... [RISC-V] Fix ICE due to bogus use of gen_rtvec (*) 89935d5... [PATCH] gcc: add trigonometric pi-based functions as gcc bu (*) 591d3d0... [PATCH] gcc: add trigonometric pi-based functions as gcc bu (*) 6ecda19... [RISC-V] Avoid setting output object more than once in IOR/ (*) 55cfd1c... RISC-V: Since the loop increment i++ is unreachable, the lo (*) 83477c3... RISC-V: Avoid scalar unsigned SAT_ADD test data duplication (*) ca62131... Daily bump. (*) 71fb2e6... Update cpplib es.po (*) 265fdb3... aarch64: Add more vector permute tests for the FMOV optimiz (*) 0417a63... aarch64: Optimize AND with certain vector of immediates as (*) dc501cb... aarch64: Recognize vector permute patterns which can be int (*) d77c3bc... aarch64: Fix an oversight in aarch64_evpc_reencode (*) 2591543... libstdc++: Use __is_invocable/nothrow_invocable builtins mo (*) ead0a71... Forwprop: add a debug dump after propagate into comparison (*) 92b6485... cobol: Eliminate exception "blob"; streamline some code gen (*) e211c49... MAINTAINERS: add myself to write after approval (*) 9fa534f... ipa: Dump cgraph_node UID instead of order into ipa-clones (*) fa36545... Further simplify the stdlib inline folding (*) dca6f35... aarch64: Fix narrowing warning in driver-aarch64.cc [PR1186 (*) 60e24ac... aarch64: Fix narrowing warning in aarch64_detect_vector_stm (*) 6d4e884... forwprop: Add alias walk limit to optimize_memcpy_to_memset (*) c1cd188... forwprop: Move memcpy_to_memset from gimple fold to forwpro (*) d87caa9... c++, coroutines: Allow NVRO in more cases for ramp function (*) 689bc39... c++: Set the outer brace marker for missed cases. (*) c875748... c++/modules: Clean up importer_interface (*) e8404a9... c++: one more coro test tweak (*) 1b9c907... Manual tweak of some end_sequence callers (*) e11ca9b... Automatic replacement of end_sequence/return pairs (*) 4dd1398... Automatic replacement of get_insns/end_sequence pairs (*) 84269ee... Make end_sequence return the insn sequence (*) c07ba53... libstdc++: Fix proc check_v3_target_namedlocale for "" loca (*) 6eead96... RISC-V: Reuse test name for vx combine test data [NFC] (*) a484b52... RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 (*) 5f523f6... RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 (*) 621cb3d... RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 (*) f8cdcca... RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 (*) ee2dcc2... RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 (*) 2e459a5... RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 (*) 4f4eb9b... RISC-V: Adjust vx combine test case to avoid name conflict (*) 414d8f3... RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combin (*) 8814d5d... RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR (*) 9361966... Daily bump. (*) de3cbcf... c++: remove coroutines.exp (*) d31ab49... Fortran: default-initialization and functions returning der (*) e87c5ef... Update gcc zh_CN.po (*) fae5392... cobol: One additional edit to testsuite/cobol.dg/group1/che (*) e0fe14e... Update cpplib zh_CN.po (*) ac55655... Enhance bitwise_and::op1_range (*) b332764... Allow bitmask intersection to process unknown masks. (*) 65cd212... Improve constant bitmasks. (*) e4c6a02... Turn get_bitmask_from_range into an irange_bitmask construc (*) 4291071... Check for casts becoming UNDEFINED. (*) 022d8e2... cobol: Don't display 0xFF HIGH-VALUE characters in testcase (*) 0babc6f... libstdc++: Fix class mandate for extents. (*) c65725e... libstdc++: Fix std::format_kind primary template for Clang (*) 270d23c... libstdc++: Micro-optimization in std::arg overload for scal (*) 6dbcbd9... libstdc++: Deprecate non-standard std::fabs(const complex<T (*) 87d0daa... [RISC-V][PR target/120223] Don't use bset/binv for XTHEADBS (*) 0c43050... c++: unifying specializations of non-primary tmpls [PR12016 (*) 9a2083f... c++: use normal std list for module tests (*) 9694bb1... c++: -fimplicit-constexpr and modules (*) 2ee1fce... c++: one more PR99599 tweak (*) f28ff1e... libstdc++: build testsuite with -Wabi (*) 5c01297... tighten type verification for CONJ_EXPR (*) (*) This commit already exists in another branch. Because the reference `refs/users/aoliva/heads/testme' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.