https://gcc.gnu.org/g:7a1aea7e6a80c742e7e434c9a8e3501d109e0fbf

commit r16-1827-g7a1aea7e6a80c742e7e434c9a8e3501d109e0fbf
Author: Christopher Bazley <chris.baz...@arm.com>
Date:   Mon Jun 30 16:59:56 2025 +0100

    ivopts: Fix scan-assembler-not regexes for aarch64/sve test
    
    The test added by r16-1671-ge7ff8e8d77df74 passed despite using
    regular expressions that would never match real assembly language
    output from the compiler. Because the regular expressions were not
    expected to match, and didn't, this was not noticeable; however,
    it also made that part of the test useless.
    
    The regular expressions have been fixed. Verified that the fixed
    regular expressions do match assembly language output produced by
    the compiler before the changes to ivopts in commit e7ff8e8d77d,
    but do not match assembly language output produced by the compiler
    after the changes to ivopts.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/sve/adr_7.c: Fix regular expressions.

Diff:
---
 gcc/testsuite/gcc.target/aarch64/sve/adr_7.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/adr_7.c 
b/gcc/testsuite/gcc.target/aarch64/sve/adr_7.c
index be9f1eb24c21..b8a3bdad3db6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/adr_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/adr_7.c
@@ -16,8 +16,8 @@ void f(int *p1, int *p2, unsigned long step, unsigned long 
end, svbool_t pg) {
 // (ie, theres only one scalar add, rather than 3, and the loads and stores 
use the
 // more complex addressing modes)
 
-/* { dg-final { scan-assembler-not {\tld1w\tz[0-9]+\.d, 
p[0-9]+/z\[x[0-9]+\.d\]} } } */
-/* { dg-final { scan-assembler-not {\tst1w\tz[0-9]+\.d, 
p[0-9]+/z\[x[0-9]+\.d\]} } } */
+/* { dg-final { scan-assembler-not {\tld1w\tz[0-9]+\.s, p[0-9]+/z, 
\[x[0-9]+\]} } } */
+/* { dg-final { scan-assembler-not {\tst1w\tz[0-9]+\.s, p[0-9]+, \[x[0-9]+\]} 
} } */
 
 /* { dg-final { scan-assembler-times {\tadd\tx[0-9]+, x[0-9]+, x[0-9]+} 1 } } 
*/
 /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.s, p[0-9]+/z, 
\[x[0-9]+, x[0-9]+, lsl 2\]} 1 } } */

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