https://gcc.gnu.org/g:9c050bc7c08f1c8874133b7e1b06e9363ece062e
commit 9c050bc7c08f1c8874133b7e1b06e9363ece062e
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Thu Jul 17 00:33:38 2025 -0400
Add support for -mcpu=future
This patch adds the support that can be used in developing GCC support for
future PowerPC processors.
2025-07-17 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* config.gcc (powerpc*-*-*): Add support for configuration option
--with-cpu=future.
* config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for
-mcpu=future.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/driver-rs6000.cc (asm_names): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): If
-mcpu=future, define _ARCH_FUTURE.
(rs6000_cpu_cpp_builtins): Likewise.
* config/rs6000/rs6000-cpus.def (RS6000_CPU_EXTRA): New optional
macro.
(future cpu): Set up for -mcpu=future.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add
argument for extra ISA bits.
(EXTRA_ISA_MASK_FUTURE): New macro.
(rs6000_target_modify_macros_ptr): Likewise.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): Add
additional argument.
(rs6000_print_isa_options): Likewise.
(RS6000_CPU_EXTRA): New macro.
(DEBUG_FMT_WX2): Likewise.
(rs6000_debug_reg_global): Add support for extra ISA options that
are
set directly via -mcpu=<xxx>, rather than having separate -m<option>
arguments.
(rs6000_option_override_internal): Likewise.
(rs6000_extra_isa_masks): New list of extra ISA options for
debugging.
(rs6000_pragma_target_parse): Add support for extra ISA options
that are
set directly via -mcpu=<xxx>, rather than having separate -m<option>
arguments.
(rs6000_function_specific_print): Likewise.
(rs6000_print_options_internal): Likewise.
(rs6000_print_isa_options): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for
-mcpu=future.
* config/rs6000/rs6000.opt (rs6000_extra_isa_flags): New target
global
variable.
(x_rs6000_extra_isa_flags): Likewise.
gcc/testsuite/
* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.
Diff:
---
gcc/config.gcc | 4 +-
gcc/config/rs6000/aix71.h | 1 +
gcc/config/rs6000/aix72.h | 1 +
gcc/config/rs6000/aix73.h | 1 +
gcc/config/rs6000/driver-rs6000.cc | 2 +
gcc/config/rs6000/rs6000-c.cc | 14 +++-
gcc/config/rs6000/rs6000-cpus.def | 22 +++++-
gcc/config/rs6000/rs6000-protos.h | 10 ++-
gcc/config/rs6000/rs6000-tables.opt | 11 ++-
gcc/config/rs6000/rs6000.cc | 110 ++++++++++++++++++++++------
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.opt | 9 +++
gcc/testsuite/gcc.target/powerpc/future-1.c | 13 ++++
gcc/testsuite/gcc.target/powerpc/future-2.c | 24 ++++++
14 files changed, 186 insertions(+), 37 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 8ed111392bb4..23143bf46b40 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -533,7 +533,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h
si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
-
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
cpu_is_64bit=yes
;;
esac
@@ -5694,7 +5694,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
- "" | common | native \
+ "" | common | native | future \
| power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 2b21dd7cd1e0..77651f5ea309 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {
\
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 53c0bde5ad4a..652f60c7f494 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {
\
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index c7639368a264..3c66ac1d9171 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {
\
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/driver-rs6000.cc
b/gcc/config/rs6000/driver-rs6000.cc
index 2ab675e6d042..d20332d76f1a 100644
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -452,6 +452,7 @@ static const struct asm_name asm_names[] = {
{ "power9", "-mpwr9" },
{ "power10", "-mpwr10" },
{ "power11", "-mpwr11" },
+ { "future", "-mfuture" },
{ "powerpc", "-mppc" },
{ "rs64", "-mppc" },
{ "603", "-m603" },
@@ -481,6 +482,7 @@ static const struct asm_name asm_names[] = {
{ "power9", "-mpower9" },
{ "power10", "-mpower10" },
{ "power11", "-mpower11" },
+ { "future", "-mfuture" },
{ "a2", "-ma2" },
{ "powerpc", "-mppc" },
{ "powerpc64", "-mppc64" },
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d3b0a5668212..82f575f04c29 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -338,13 +338,16 @@ rs6000_define_or_undefine_macro (bool define_p, const
char *name)
#pragma GCC target, we need to adjust the macros dynamically. */
void
-rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
+rs6000_target_modify_macros (bool define_p,
+ HOST_WIDE_INT flags,
+ HOST_WIDE_INT extra_isa)
{
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
fprintf (stderr,
- "rs6000_target_modify_macros (%s, " HOST_WIDE_INT_PRINT_HEX ")\n",
+ "rs6000_target_modify_macros (%s, "
+ HOST_WIDE_INT_PRINT_HEX ", " HOST_WIDE_INT_PRINT_HEX ")\n",
(define_p) ? "define" : "undef",
- flags);
+ flags, extra_isa);
/* Each of the flags mentioned below controls whether certain
preprocessor macros will be automatically defined when
@@ -437,6 +440,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT
flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
if ((flags & OPTION_MASK_POWER11) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+ if ((extra_isa & EXTRA_ISA_MASK_FUTURE) != 0)
+ rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
@@ -605,7 +610,8 @@ void
rs6000_cpu_cpp_builtins (cpp_reader *pfile)
{
/* Define all of the common macros. */
- rs6000_target_modify_macros (true, rs6000_isa_flags);
+ rs6000_target_modify_macros (true, rs6000_isa_flags,
+ rs6000_extra_isa_flags);
if (TARGET_FRE)
builtin_define ("__RECIP__");
diff --git a/gcc/config/rs6000/rs6000-cpus.def
b/gcc/config/rs6000/rs6000-cpus.def
index 4a1037616d7f..0a93298ba38a 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -160,11 +160,21 @@
Please keep this list in order, and don't forget to update the documentation
in invoke.texi when adding a new processor or flag.
- Before including this file, define a macro:
+ Before including this file, define two macros:
RS6000_CPU (NAME, CPU, FLAGS)
+ RS6000_CPU_EXTRA (NAME, CPU, FLAGS, EXTRA)
- where the arguments are the fields of struct rs6000_ptt. */
+ where the arguments are the fields of struct rs6000_ptt.
+
+ If RS6000_CPU_EXTRA is not defined, it will default to using RS6000_CPU and
+ ignoring the EXTRA argument. RS6000_CPU_EXTRA is used to define extra ISA
+ bits that do not have an option associated with them. */
+
+#ifndef RS6000_CPU_EXTRA
+#define RS6000_CPU_EXTRA(NAME, CPU, FLAGS, EXTRA) \
+ RS6000_CPU(NAME, CPU, FLAGS)
+#endif
RS6000_CPU ("401", PROCESSOR_PPC403, OPTION_MASK_SOFT_FLOAT)
RS6000_CPU ("403", PROCESSOR_PPC403, OPTION_MASK_SOFT_FLOAT |
MASK_STRICT_ALIGN)
@@ -249,6 +259,14 @@ RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 |
ISA_3_0_MASKS_SERVER
| OPTION_MASK_HTM)
RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 |
ISA_3_1_MASKS_SERVER)
RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 |
POWER11_MASKS_SERVER)
+
+/* Do not define a PROCESSOR_FUTURE processor type at the current time. It is
+ expected that we may eventually add tuning support for a potential future
+ processor that differs from power11 support. */
+RS6000_CPU_EXTRA ("future", PROCESSOR_POWER11,
+ MASK_POWERPC64 | POWER11_MASKS_SERVER,
+ EXTRA_ISA_MASK_FUTURE)
+
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
| MASK_POWERPC64)
diff --git a/gcc/config/rs6000/rs6000-protos.h
b/gcc/config/rs6000/rs6000-protos.h
index 234eb0ae2b3a..a0c5059042a3 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -324,8 +324,9 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
extern bool rs6000_pragma_target_parse (tree, tree);
#endif
extern void rs6000_activate_target_options (tree new_tree);
-extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT);
-extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
+extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT);
+extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT,
+ HOST_WIDE_INT);
#ifdef NO_DOLLAR_IN_LABEL
const char * rs6000_xcoff_strip_dollar (const char *);
@@ -352,4 +353,9 @@ extern rtx rs6000_gen_stvx (enum machine_mode, rtx, rtx);
extern void rs6000_emit_xxspltidp_v2df (rtx, long value);
extern gimple *currently_expanding_gimple_stmt;
extern bool rs6000_opaque_type_invalid_use_p (gimple *);
+
+/* Extra ISA bits that are set via -mcpu=<xxx>, but that do not have an
+ associated switch with the option. */
+#define EXTRA_ISA_MASK_FUTURE 0x1 /* -mcpu=future used. */
+
#endif /* rs6000-protos.h */
diff --git a/gcc/config/rs6000/rs6000-tables.opt
b/gcc/config/rs6000/rs6000-tables.opt
index f5bbed5ea746..518324e7aead 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -189,14 +189,17 @@ EnumValue
Enum(rs6000_cpu_opt_value) String(power11) Value(53)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
+Enum(rs6000_cpu_opt_value) String(future) Value(54)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)
EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 7ee26e52b138..c2a21afea036 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -276,7 +276,7 @@ bool cpu_builtin_p = false;
/* Pointer to function (in rs6000-c.cc) that can define or undefine target
macros that have changed. Languages that don't support the preprocessor
don't link in rs6000-c.cc, so we can't call it directly. */
-void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
+void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT);
/* Simplfy register classes into simpler classifications. We assume
GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range
@@ -1169,7 +1169,7 @@ enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx,
enum reg_class)
const int INSN_NOT_AVAILABLE = -1;
static void rs6000_print_isa_options (FILE *, int, const char *,
- HOST_WIDE_INT);
+ HOST_WIDE_INT, HOST_WIDE_INT);
static HOST_WIDE_INT rs6000_disable_incompatible_switches (void);
static enum rs6000_reg_type register_to_reg_type (rtx, bool *);
@@ -1792,13 +1792,18 @@ struct rs6000_ptt
const char *const name; /* Canonical processor name. */
const enum processor_type processor; /* Processor type enum value. */
const HOST_WIDE_INT target_enable; /* Target flags to enable. */
+ const HOST_WIDE_INT extra_isa; /* Extra ISA flags. */
};
static struct rs6000_ptt const processor_target_table[] =
{
-#define RS6000_CPU(NAME, CPU, FLAGS) { NAME, CPU, FLAGS },
+#undef RS6000_CPU_EXTRA
+#define RS6000_CPU(NAME, CPU, FLAGS) { NAME, CPU, FLAGS, 0 },
+#define RS6000_CPU_EXTRA(NAME, CPU, FLAGS, EXTRA) \
+ { NAME, CPU, FLAGS, EXTRA },
#include "rs6000-cpus.def"
#undef RS6000_CPU
+#undef RS6000_CPU_EXTRA
};
/* Look up a processor name for -mcpu=xxx and -mtune=xxx. Return -1 if the
@@ -2221,6 +2226,8 @@ rs6000_debug_print_mode (ssize_t m)
#define DEBUG_FMT_ID "%-32s= "
#define DEBUG_FMT_D DEBUG_FMT_ID "%d\n"
#define DEBUG_FMT_WX DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x: "
+#define DEBUG_FMT_WX2 DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x" \
+ ", %#" HOST_WIDE_INT_PRINT "x: "
#define DEBUG_FMT_S DEBUG_FMT_ID "%s\n"
/* Print various interesting information with -mdebug=reg. */
@@ -2400,9 +2407,11 @@ rs6000_debug_reg_global (void)
const char *name = processor_target_table[rs6000_cpu_index].name;
HOST_WIDE_INT flags
= processor_target_table[rs6000_cpu_index].target_enable;
+ HOST_WIDE_INT extra
+ = processor_target_table[rs6000_cpu_index].extra_isa;
sprintf (flags_buffer, "-mcpu=%s flags", name);
- rs6000_print_isa_options (stderr, 0, flags_buffer, flags);
+ rs6000_print_isa_options (stderr, 0, flags_buffer, flags, extra);
}
else
fprintf (stderr, DEBUG_FMT_S, "cpu", "<none>");
@@ -2414,19 +2423,19 @@ rs6000_debug_reg_global (void)
= processor_target_table[rs6000_tune_index].target_enable;
sprintf (flags_buffer, "-mtune=%s flags", name);
- rs6000_print_isa_options (stderr, 0, flags_buffer, flags);
+ rs6000_print_isa_options (stderr, 0, flags_buffer, flags, 0);
}
else
fprintf (stderr, DEBUG_FMT_S, "tune", "<none>");
cl_target_option_save (&cl_opts, &global_options, &global_options_set);
rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags",
- rs6000_isa_flags);
+ rs6000_isa_flags, rs6000_extra_isa_flags);
rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags_explicit",
- rs6000_isa_flags_explicit);
+ rs6000_isa_flags_explicit, 0);
- rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT, 0);
fprintf (stderr, DEBUG_FMT_S, "--with-cpu default",
OPTION_TARGET_CPU_DEFAULT ? OPTION_TARGET_CPU_DEFAULT : "<none>");
@@ -3623,7 +3632,7 @@ rs6000_option_override_internal (bool global_init_p)
/* Print defaults. */
if ((TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) && global_init_p)
- rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT, 0);
/* Remember the explicit arguments. */
if (global_init_p)
@@ -3727,6 +3736,7 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~set_masks;
rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& set_masks);
+ rs6000_extra_isa_flags = processor_target_table[cpu_index].extra_isa;
}
else
{
@@ -3752,6 +3762,7 @@ rs6000_option_override_internal (bool global_init_p)
flags = processor_target_table[default_cpu_index].target_enable;
}
rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
+ rs6000_extra_isa_flags = 0;
}
/* Don't expect powerpc64 enabled on those OSes with OS_MISSING_POWERPC64,
@@ -3873,7 +3884,8 @@ rs6000_option_override_internal (bool global_init_p)
& ~rs6000_isa_flags_explicit);
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags);
+ rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags,
+ rs6000_extra_isa_flags);
#ifdef XCOFF_DEBUGGING_INFO
/* For AIX default to 64-bit DWARF. */
@@ -4234,7 +4246,8 @@ rs6000_option_override_internal (bool global_init_p)
/* Print the options after updating the defaults. */
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);
+ rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags,
+ rs6000_extra_isa_flags);
/* E500mc does "better" if we inline more aggressively. Respect the
user's opinion, though. */
@@ -4341,7 +4354,8 @@ rs6000_option_override_internal (bool global_init_p)
TARGET_NO_FP_IN_TOC = 1;
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags);
+ rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags,
+ rs6000_extra_isa_flags);
#ifdef SUBTARGET_OVERRIDE_OPTIONS
SUBTARGET_OVERRIDE_OPTIONS;
@@ -4408,7 +4422,8 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);
+ rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags,
+ rs6000_extra_isa_flags);
rs6000_always_hint = (rs6000_tune != PROCESSOR_POWER4
&& rs6000_tune != PROCESSOR_POWER5
@@ -24508,6 +24523,11 @@ static struct rs6000_opt_mask const rs6000_opt_masks[]
=
{ "string", 0, false, false },
};
+static struct rs6000_opt_mask const rs6000_extra_isa_masks[] =
+{
+ { "future", EXTRA_ISA_MASK_FUTURE, false, true },
+};
+
/* Option variables that we want to support inside attribute((target)) and
#pragma GCC target operations. */
@@ -24866,6 +24886,7 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
tree cur_tree;
struct cl_target_option *prev_opt, *cur_opt;
HOST_WIDE_INT prev_flags, cur_flags, diff_flags;
+ HOST_WIDE_INT prev_extra, cur_extra, diff_extra;
if (TARGET_DEBUG_TARGET)
{
@@ -24918,21 +24939,26 @@ rs6000_pragma_target_parse (tree args, tree
pop_target)
{
prev_opt = TREE_TARGET_OPTION (prev_tree);
prev_flags = prev_opt->x_rs6000_isa_flags;
+ prev_extra = prev_opt->x_rs6000_extra_isa_flags;
cur_opt = TREE_TARGET_OPTION (cur_tree);
cur_flags = cur_opt->x_rs6000_isa_flags;
+ cur_extra = cur_opt->x_rs6000_extra_isa_flags;
diff_flags = (prev_flags ^ cur_flags);
+ diff_extra = (prev_extra ^ cur_extra);
- if (diff_flags != 0)
+ if (diff_flags != 0 || diff_extra != 0)
{
/* Delete old macros. */
rs6000_target_modify_macros_ptr (false,
- prev_flags & diff_flags);
+ prev_flags & diff_flags,
+ prev_extra & diff_extra);
/* Define new macros. */
rs6000_target_modify_macros_ptr (true,
- cur_flags & diff_flags);
+ cur_flags & diff_flags,
+ cur_extra & diff_extra);
}
}
@@ -25068,10 +25094,11 @@ rs6000_function_specific_print (FILE *file, int
indent,
struct cl_target_option *ptr)
{
rs6000_print_isa_options (file, indent, "Isa options set",
- ptr->x_rs6000_isa_flags);
+ ptr->x_rs6000_isa_flags,
+ ptr->x_rs6000_extra_isa_flags);
rs6000_print_isa_options (file, indent, "Isa options explicit",
- ptr->x_rs6000_isa_flags_explicit);
+ ptr->x_rs6000_isa_flags_explicit, 0);
}
/* Helper function to print the current isa or misc options on a line. */
@@ -25083,7 +25110,11 @@ rs6000_print_options_internal (FILE *file,
HOST_WIDE_INT flags,
const char *prefix,
const struct rs6000_opt_mask *opts,
- size_t num_elements)
+ size_t num_elements,
+ HOST_WIDE_INT extra,
+ const char *extra_prefix,
+ const struct rs6000_opt_mask *extra_opts,
+ size_t num_extra_elements)
{
size_t i;
size_t start_column = 0;
@@ -25096,13 +25127,16 @@ rs6000_print_options_internal (FILE *file,
if (indent)
start_column += fprintf (file, "%*s", indent, "");
- if (!flags)
+ if (!flags && !extra)
{
fprintf (stderr, DEBUG_FMT_S, string, "<none>");
return;
}
- start_column += fprintf (stderr, DEBUG_FMT_WX, string, flags);
+ if (extra)
+ start_column += fprintf (stderr, DEBUG_FMT_WX2, string, flags, extra);
+ else
+ start_column += fprintf (stderr, DEBUG_FMT_WX, string, flags);
/* Print the various mask options. */
cur_column = start_column;
@@ -25149,6 +25183,33 @@ rs6000_print_options_internal (FILE *file,
comma_len = strlen (", ");
}
+ /* print the extra isa bits that are set directly from -mcpu=<xxx> and there
+ is not an explicit -m<foo> option. We don't have to worry about inverting
+ options for the extra ISA bits. */
+ for (i = 0; i < num_extra_elements; i++)
+ {
+ const char *name = extra_opts[i].name;
+ HOST_WIDE_INT mask = extra_opts[i].mask;
+ size_t len = comma_len + prefix_len + strlen (name);
+
+ if ((extra & mask) != 0)
+ {
+ extra &= ~mask;
+
+ cur_column += len;
+ if (cur_column > max_column)
+ {
+ fprintf (stderr, ", \\\n%*s", (int)start_column, "");
+ cur_column = start_column + len;
+ comma = "";
+ }
+
+ fprintf (file, "%s%s%s", comma, extra_prefix, name);
+ comma = ", ";
+ comma_len = strlen (", ");
+ }
+ }
+
fputs ("\n", file);
}
@@ -25156,11 +25217,14 @@ rs6000_print_options_internal (FILE *file,
static void
rs6000_print_isa_options (FILE *file, int indent, const char *string,
- HOST_WIDE_INT flags)
+ HOST_WIDE_INT flags, HOST_WIDE_INT extra_isa)
{
rs6000_print_options_internal (file, indent, string, flags, "-m",
&rs6000_opt_masks[0],
- ARRAY_SIZE (rs6000_opt_masks));
+ ARRAY_SIZE (rs6000_opt_masks),
+ extra_isa, "extra=",
+ &rs6000_extra_isa_masks[0],
+ ARRAY_SIZE (rs6000_extra_isa_masks));
}
/* If the user used -mno-vsx, we need turn off all of the implicit ISA 2.06,
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index db6112a09e11..76c6cd1ab8ef 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -101,6 +101,7 @@
you make changes here, make them also there. */
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpower11; \
mcpu=power10: -mpower10; \
mcpu=power9: -mpower9; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 88cf16ca581a..a7b232bd6e66 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -36,6 +36,15 @@ HOST_WIDE_INT rs6000_isa_flags_explicit
TargetSave
HOST_WIDE_INT x_rs6000_isa_flags_explicit
+;; Extra ISA flag bits (on/off) that are enabled with the -mcpu=
+;; option, but do not have an explicit option attached to the ISA bit.
+;; This is used for things like -mcpu=future.
+Variable
+HOST_WIDE_INT rs6000_extra_isa_flags = 0
+
+TargetSave
+HOST_WIDE_INT x_rs6000_extra_isa_flags
+
;; Current processor
TargetVariable
enum processor_type rs6000_cpu = PROCESSOR_PPC603
diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c
b/gcc/testsuite/gcc.target/powerpc/future-1.c
new file mode 100644
index 000000000000..7bd8e5ddbd00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Basic check to see if the compiler supports -mcpu=future and if it defines
+ _ARCH_FUTURE. */
+
+#ifndef _ARCH_FUTURE
+#error "-mcpu=future is not supported"
+#endif
+
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c
b/gcc/testsuite/gcc.target/powerpc/future-2.c
new file mode 100644
index 000000000000..5552cefa3c2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Check if we can set the future target via a target attribute. */
+
+__attribute__((__target__("cpu=power9")))
+void foo_p9 (void)
+{
+}
+
+__attribute__((__target__("cpu=power10")))
+void foo_p10 (void)
+{
+}
+
+__attribute__((__target__("cpu=power11")))
+void foo_p11 (void)
+{
+}
+
+__attribute__((__target__("cpu=future")))
+void foo_future (void)
+{
+}
